MC9S08QE8CLC Freescale Semiconductor, MC9S08QE8CLC Datasheet - Page 22

• Manufacturer Part Number: MC9S08QE8CLC
• Description: IC MCU 8BIT 8K FLASH 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08QE8CLC

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 512Byte
• # I/os (max): 26
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 10-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: LQFP
• Processor Series: S08QE
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOQE128, EVBQE128
• Minimum Operating Temperature: - 40 C
• Package: 32LQFP
• Family Name: HCS08
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3 V
• For Use With: DEMO9S08QE8 - BOARD DEMO FOR MC9S08Q
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Electrical Characteristics
3.10.3
Table 14
22
No.
10
11
12
—
1
2
3
4
5
6
7
8
9
and
SPI Timing
Figure 19
C
D
D
D
D
D
D
D
D
D
D
D
D
D
Operating frequency
SPSCK period
Enable lead time
Enable lag time
Clock (SPSCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Slave MISO disable time
Data valid (after SPSCK edge)
Data hold time (outputs)
Rise time
Fall time
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Input
Output
Input
Output
through
Function
Figure 22
MC9S08QE8 Series Data Sheet, Rev. 8
describe the timing requirements for the SPI system.
Table 14. SPI Timing
t
Symbol
WSPSCK
t
SPSCK
t
t
Lead
t
t
t
t
t
f
Lag
t
t
t
HO
RO
SU
t
dis
FO
op
t
HI
RI
FI
a
v
f
t
t
Bus
cyc
cyc
Min
12
12
15
15
25
—
—
—
—
—
—
—
—
/2048
0
2
4
1
1
0
0
0
–30
– 30
1024 t
t
t
cyc
cyc
f
f
2048
Max
Bus
Bus
25
25
25
25
—
—
—
—
—
—
—
—
—
—
—
—
1
1
– 25
– 25
/2
/4
Freescale Semiconductor
cyc
t
t
SPSCK
SPSCK
Unit
t
t
t
t
t
t
Hz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
cyc