MCR908JL3ECFAE Freescale Semiconductor, MCR908JL3ECFAE Datasheet - Page 51
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MCR908JL3ECFAE
Manufacturer Part Number
MCR908JL3ECFAE
Description
IC MCU 4K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JK1ECDWE.pdf
(180 pages)
Specifications of MCR908JL3ECFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCR908JL3ECFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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5.2 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, OSCOUT, as shown in
5.2.1 Bus Timing
In user mode, the internal bus frequency is the oscillator frequency (2OSCOUT) divided by four.
5.2.2 Clock Start-Up from POR
When the power-on reset module generates a reset, the clocks to the CPU and peripherals are inactive
and held in an inactive phase until after the 4096 2OSCOUT cycle POR time-out has completed. The RST
pin is driven low by the SIM during this entire period. The IBUS clocks start upon completion of the
time-out.
5.2.3 Clocks in Stop Mode and Wait Mode
Upon exit from stop mode by an interrupt, break, or reset, the SIM allows 2OSCOUT to clock the SIM
counter. The CPU and peripheral clocks do not become active until after the stop delay time-out. This
time-out is selectable as 4096 or 32 2OSCOUT cycles. (See
In wait mode, the CPU clocks are inactive. The SIM also produces two sets of clocks for other modules.
Refer to the wait mode subsection of each module to see if the module is active or inactive in wait mode.
Some modules can be programmed to be active in wait mode.
Freescale Semiconductor
Addr.
$FE04
$FE05
$FE06
Interrupt Status Register 1
Interrupt Status Register 2
Interrupt Status Register 3
Register Name
(INT1)
(INT2)
(INT3)
OSCILLATOR
OSCILLATOR
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 5-2. SIM I/O Register Summary
FROM
FROM
MC68HC908JL3E Family Data Sheet, Rev. 4
Bit 7
IF14
Figure 5-3. SIM Clock Signals
R
R
R
0
0
0
0
0
2OSCOUT
= Unimplemented
OSCOUT
IF5
6
R
R
R
0
0
0
0
0
IF4
R
R
R
5
0
0
0
0
0
SIM COUNTER
÷
2
SIM
5.6.2 Stop
IF3
4
R
R
R
0
0
0
0
0
GENERATORS
BUS CLOCK
SIM Bus Clock Control and Generation
Mode.)
3
R
R
R
R
0
0
0
0
0
0
Figure
= Reserved
IF1
2
R
R
R
0
0
0
0
0
5-3.
1
R
R
R
0
0
0
0
0
0
Bit 0
IF15
R
R
R
0
0
0
0
0
51
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