MC908QL4MDTER Freescale Semiconductor, MC908QL4MDTER Datasheet - Page 114

• Manufacturer Part Number: MC908QL4MDTER
• Description: IC MCU 8BIT 4K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QL4MDTER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Input/Output Ports (PORTS)
PTAPUE[5:0] — Port A Input Pullup/Down Enable Bits
12.3.4 Port A Summary Table
The following table summarizes the operation of the port A pins when used as a general-purpose
input/output pins.
12.4 Port B
Port B is an 8-bit special function port that shares its pins with the 2-channel timer interface module (TIM)
(see
Converter (ADC10)
LIN Interface Controller (SLIC)
Each port B pin also has a software configurable pullup device if the corresponding port pin is configured
as an input port.
12.4.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the port B pins.
PTB[7:0] — Port B Data Bits
114
These read/write bits are software programmable to enable pullup/down devices on port A pins.
These read/write bits are software programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
Chapter 15 Timer Interface Module
1 = Corresponding port A pin configured to have internal pullup/down if its DDRA bit is set to 0
0 = Pullup/down device is disconnected on the corresponding port A pin regardless of the state of
1. X = don’t care
2. I/O pin pulled to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
5. Output does not apply to PTA2
PTAPUE
its DDRA bit
Bit
X
1
0
Reset:
Read:
Write:
DDRA
Module), and the slave LIN interface controller (SLIC) module (see
Bit
PTB7
0
0
1
Bit 7
Pull
PTA
X
Bit
(V
X
X
(1)
PTB6
Figure 12-5. Port B Data Register (PTB)
DD
Module).
6
or V
Table 12-1. Port A Pin Functions
Input, V
Input, Hi-Z
MC68HC908QL4 Data Sheet, Rev. 8
SS
I/O Pin
Output
Mode
) by internal pullup or pulldown.
PTB5
(TIM)), the 10-bit ADC (see
5
Pull
(2)
(4)
Unaffected by reset
PTB4
Accesses to DDRA
4
DDRA5–DDRA0
DDRA5–DDRA0
DDRA5–DDRA0
Read/Write
PTB3
3
PTB2
2
Chapter 3 Analog-to-Digital
PTA5–PTA0
Read
Pin
Pin
Accesses to PTA
PTB1
1
Freescale Semiconductor
PTA5–PTA0
PTA5–PTA0
PTA5–PTA0
PTB0
Bit 0
Chapter 14 Slave
Write
(3)
(3)
(5)