MC908QL4MDTER Freescale Semiconductor, MC908QL4MDTER Datasheet - Page 133

• Manufacturer Part Number: MC908QL4MDTER
• Description: IC MCU 8BIT 4K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QL4MDTER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 14
Slave LIN Interface Controller (SLIC) Module
14.1 Introduction
The slave LIN interface controller (SLIC) is designed to provide slave node connectivity on a local
interconnect network (LIN) sub-bus. LIN is an open-standard serial protocol developed for the automotive
industry to connect sensors, motors, and actuators.
The SLIC shares its pins with general-purpose input/output (I/O) port pins. See
location of these shared pins.
14.2 Features
The SLIC includes these distinctive features:
1. Maximum bit rate of SLIC module dependent upon frequency of SLIC input clock.
Freescale Semiconductor
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Full LIN message buffering of identifier and 8 data bytes
Automatic bit rate and LIN message frame synchronization:
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Automatic processing and verification of LIN SYNCH BREAK and SYNCH BYTE
Automatic checksum calculation and verification with error reporting
Maximum of two interrupts per standard LIN message frame with no errors
Full LIN error checking and reporting
High-speed LIN capability up to 83.33 kbps to 120.00 kbps
Configurable digital receive filter
Streamlined interrupt servicing through use of a state vector register
Switchable UART-like byte transfer mode for processing bytes one at a time without LIN message
framing constraints
Enhanced checksum (includes ID) generation and verification
No prior programming of bit rate required, 1–20 kbps LIN bus speed operation
All LIN messages will be received (no message loss due to synchronization process)
Input clock tolerance as high as ±50%, allowing internal oscillator to remain untrimmed
Incoming break symbols always allowed to be 10 or more bit times without message loss
Supports automatic software trimming of internal oscillator using LIN synchronization data
MC68HC908QL4 Data Sheet, Rev. 8
(1)
Figure 14-1
for port
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