MC68908GZ8VFAE Freescale Semiconductor, MC68908GZ8VFAE Datasheet - Page 209
![IC MCU 8BIT 8K FLASH 48-LQFP](/photos/37/62/376278/tqfp-48_sml.jpg)
MC68908GZ8VFAE
Manufacturer Part Number
MC68908GZ8VFAE
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68908GZ8CFJER.pdf
(314 pages)
Specifications of MC68908GZ8VFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Processor Series
M689xx
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
ESCI, SPI, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68908GZ8VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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15.9 ESCI Arbiter
The ESCI module comprises an arbiter module designed to support software for communication tasks as
bus arbitration, baud rate recovery and break time detection. The arbiter module consists of an 9-bit
counter with 1-bit overflow and control logic. The CPU can control operation mode via the ESCI arbiter
control register (SCIACTL).
15.9.1 ESCI Arbiter Control Register
AM1 and AM0 — Arbiter Mode Select Bits
ALOST — Arbitration Lost Flag
ACLK — Arbiter Counter Clock Select Bit
AFIN— Arbiter Bit Time Measurement Finish Flag
Freescale Semiconductor
These read/write bits select the mode of the arbiter module as shown in
AM1 and AM0.
This read-only bit indicates loss of arbitration. Clear ALOST by writing a logic 0 to AM1. Reset clears
ALOST.
This read/write bit selects the arbiter counter clock source. Reset clears ACLK.
This read-only bit indicates bit time measurement has finished. Clear AFIN by writing any value to
SCIACTL. Reset clears AFIN.
1 = Arbiter counter is clocked with one quarter of the ESCI input clock generated by the ESCI
0 = Arbiter counter is clocked with the bus clock divided by four
1 = Bit time measurement has finished
0 = Bit time measurement not yet finished
prescaler
Address:
For ACLK = 1, the Arbiter input clock is driven from the ESCI prescaler. The
prescaler can be clocked by either the bus clock or CGMXCLK depending
on the state of the ESCIBDSRC bit in CONFIG2.
Reset:
Read:
Write:
Figure 15-19. ESCI Arbiter Control Register (SCIACTL)
$000A
AM1
Bit 7
0
AM[1:0]
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Table 15-12. ESCI Arbiter Selectable Modes
0 0
0 1
1 0
1 1
= Unimplemented
ALOST
6
0
AM0
Idle / counter reset
Bit time measurement
Bus arbitration
Reserved / do not use
5
0
NOTE
ACLK
4
0
ESCI Arbiter Mode
AFIN
3
0
ARUN
2
0
Table
AROVFL
1
0
15-12. Reset clears
ARD8
Bit 0
0
ESCI Arbiter
209
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