R5F211B1SP#U0 Renesas Electronics America, R5F211B1SP#U0 Datasheet - Page 266
R5F211B1SP#U0
Manufacturer Part Number
R5F211B1SP#U0
Description
IC R8C MCU FLASH 4K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/1Br
Datasheets
1.R5F211A2SPU0.pdf
(51 pages)
2.R5F211A2SPU0.pdf
(300 pages)
3.R5F211A2SPU0.pdf
(341 pages)
Specifications of R5F211B1SP#U0
Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K5211B4S001BE - KIT STARTER FOR R8C/18191A1BR0K5211B4S000BE - KIT DEV EVALUATION R8C/1BR0E521174CPE10 - EMULATOR COMPACT R8C/18/19/1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Rev.2.00 Oct 17, 2005
REJ09B0001-0200
5.1 Outline of Interrupts
Chapter 5
When an interrupt request is acknowledged, control branches to the interrupt routine that is set in an inter-
rupt vector table. Each interrupt vector table must have had the start address of its corresponding interrupt
routine set. For details about interrupt vector tables, refer to section 1.10, “Vector Tables”.
Figure 5.1.1 Classification of Interrupts
Interrupt
5.1.1 Types of Interrupts
Figure 5.1.1 lists the types of interrupts. Table 5.1.1 lists the source of interrupts (nonmaskable) and the
fixed vector tables.
Notes 1: Peripheral function interrupts are generated by the peripheral functions built into the
•Maskable interrupt:
•Nonmaskable interrupt: This type of interrupt cannot be controlled by using the I flag to enable (or disable)
2: This is a dedicated interrupt for development support tools. Do not use this interrupt.
Software
(nonmaskable interrupt)
Hardware
Interrupts
microcomputer system.
page 246 of 263
Special
(nonmaskable interrupt)
Peripheral I/O
(maskable interrupt)
This type of interrupt can be controlled by using the I flag to enable (or
disable) the interrupts or by changing the interrupt priority level.
the interrupts or by changing the interrupt priority level.
1
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
INT instruction
Watchdog timer
Oscillation stop detection
Single-step
Address match
2
5.1 Outline of Interrupts
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