MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 259

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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20.7 5.0-Volt Control Timing
20.8 3.3-Volt Control Timing
Freescale Semiconductor
Frequency of operation
Internal operating frequency
Internal clock period (1/f
RESET input pulse width low
IRQ interrupt pulse width low
IRQ interrupt pulse period
Frequency of operation
Internal operating frequency
Internal clock period (1/f
RESET input pulse width low
IRQ interrupt pulse width low
IRQ interrupt pulse period
1. V
2. No more than 10% duty cycle deviation from 50%.
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
4. Minimum pulse width is for guaranteed interrupt. It is possible for a smaller pulse width to be recognized.
1. V
2. No more than 10% duty cycle deviation from 50%.
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
4. Minimum pulse width is for guaranteed interrupt. It is possible for a smaller pulse width to be recognized.
Crystal option
External clock option
Crystal option
External clock option
SS
SS
= 0 Vdc; timing shown with respect to 20% V
= 0 Vdc; timing shown with respect to 20% V
RST
IRQ
(2)
(2)
OP
OP
Characteristic
Characteristic
)
)
(3)
(4)
(3)
(4)
(edge-triggered)
(edge-triggered)
Figure 20-1. RST and IRQ Timing
MC68HC908GR16 Data Sheet, Rev. 5.0
(1)
(1)
t
t
ILIH
RL
DD
DD
and 70% V
and 70% V
t
ILIL
DD
DD
unless otherwise noted.
unless otherwise noted.
f
f
Symbol
Symbol
OP
OP
f
t
f
t
t
t
t
t
t
t
OSC
CYC
OSC
CYC
ILIH
ILIH
ILIL
ILIL
IRL
IRL
(f
(f
Bus
Bus
)
)
Note 5
Note 5
Min
Min
122
244
125
125
32
dc
50
50
32
dc
5.0-Volt Control Timing
Max
32.8
Max
16.4
100
100
8.2
4.1
Unit
MHz
MHz
t
Unit
MHz
MHz
t
kHz
kHz
CYC
CYC
ns
ns
ns
ns
ns
ns
259

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