M38503G4AFP#U1 Renesas Electronics America, M38503G4AFP#U1 Datasheet - Page 39

• Manufacturer Part Number: M38503G4AFP#U1
• Description: IC 740/3850 MCU QZ-ROM 42SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38503G4AFP#U1

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: QzROM
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3850 Group (Spec.A QzROM version)
Rev.2.13
REJ03B0125-0213
Fig 41. Internal status at reset
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
Port P0 (P0)
Port P0 direction register (P0D)
Port P1 (P1)
Port P1 direction register (P1D)
Port P2 (P2)
Port P2 direction register (P2D)
Port P3 (P3)
Port P3 direction register (P3D)
Port P4 (P4)
Port P4 direction register (P4D)
Port P0, P1, P2 pull-upcontrolregister (PULL012)
Port P3 pull-up control register (PULL3)
Port P4 pull-up control register (PULL4)
Serial I/O2 control register 1 (SIO2CON1)
Serial I/O2 control register 2 (SIO2CON2)
Serial I/O2 register (SIO2)
Transmit/Receive buffer register (TB/RB)
Serial I/O1 status register (SIOSTS)
Serial I/O1 control register (SIOCON)
UART control register (UARTCON)
Baud rate generator (BRG)
PWM control register (PWMCON)
PWM prescaler (PREPWM)
PWM register (PWM)
Prescaler 12 (PRE12)
Timer 1 (T1)
Timer 2 (T2)
Timer XY mode register (TM)
Prescaler X (PREX)
Timer X (TX)
Prescaler Y (PREY)
Timer Y (TY)
Timer count source selection register (TCSS)
Apr 17, 2009
Page 37 of 56
Address Register contents
001A
001B
001C
001D
001E
001F
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027
0028
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
X
X
X
X
0 0 0 0 0 1 1 1
X
1 0 0 0 0 0 0 0
1 1 1 0 0 0 0 0
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
FF
FF
FF
FF
FF
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
01
00
00
00
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
X
X
X
X
X
X X
X X
X X
X X
X X
(34)
(35)
(36)
(37)
(38)
(39)
(40)
(41)
(42)
(43)
(44)
(45)
(46)
(47)
Note : X : Not fixed
AD control register (ADCON)
AD conversion low-order register (ADL)
AD conversion high-order register (ADH)
AD input selection register (ADSEL)
MISRG
Watchdog timer control register (WDTCON)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
Processor status register
Program counter
Since the initial values for other than above mentioned registers and
RAM contents are indefinite at reset, they must be set.
Address Register contents
003C
003D
003A
003B
003E
003F
0034
0035
0036
0037
0038
0039
(PC
(PC
(PS)
16
16
16
16
16
16
16
16
16
16
16
16
H
L
)
)
X
X
0 0 0 1 0 0 0 0
0 0 0 0 0 0
0
0 1 0 0 1 0 0 0
FFFD
FFFC
X X
X X
0 1 1 1 1
16
16
X X
X X
00
00
00
00
00
00
00
contents
contents
16
16
16
16
16
16
16
X
1
X X
X X
X X
1
1