MC9S08RG60CFGE Freescale Semiconductor, MC9S08RG60CFGE Datasheet - Page 123
![IC MCU 60K FLASH 8MHZ 44LQFP](/photos/38/0/380058/lqfp-44_sml.jpg)
MC9S08RG60CFGE
Manufacturer Part Number
MC9S08RG60CFGE
Description
IC MCU 60K FLASH 8MHZ 44LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08RE8FJE.pdf
(234 pages)
Specifications of MC9S08RG60CFGE
Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08RG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08RG60E
Minimum Operating Temperature
- 40 C
Controller Family/series
HCS08
No. Of I/o's
39
Ram Memory Size
60KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
For Use With
DEMO9S08RG60E - BOARD DEMO S08RG/RC/RD/RE FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08RG60CFGE
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MC9S08RG60CFGE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 9
Keyboard Interrupt (S08KBIV1)
9.1
The MC9S08RC/RD/RE/RG has two KBI modules. One has eight keyboard interrupt inputs that share
port A pins. The other KBI module has four inputs that are shared on the upper four pins of port C. See the
Pins and Connections
Port A is an 8-bit port that is shared between the KBI1 keyboard interrupt inputs and general-purpose I/O.
The eight KBI1PEn control bits in the KBI1PE register allow selection of any combination of port A pins
to be assigned as KBI1 inputs. Any pins that are enabled as KBI1 inputs will be forced to act as inputs and
the remaining port A pins are available as general-purpose I/O pins controlled by the port A data (PTAD),
data direction (PTADD) and pullup enable (PTAPE) registers. The eight PTAPEn control bits in the
PTAPE register allow the user to select whether an internal pullup device is enabled on each port A pin
that is configured as a port input or a KBI1 input.
KBI1 inputs can be configured for edge-only sensitivity or edge-and-level sensitivity. Bits 3 through 0 of
port A are falling-edge/low-level sensitive and bits 7 through 4 can be configured for
rising-edge/high-level or for falling-edge/low-level sensitivity.
Port C is an 8-bit port with its lower four pins shared between the KBI2 keyboard interrupt inputs and
general-purpose I/O. The four KBI2PEn control bits in the KBI2PE register allow selection of any
combination of the lower four port C pins to be assigned as KBI2 inputs. Any pins that are enabled as KBI2
inputs will be forced to act as inputs and the remaining port C pins are available as general-purpose I/O
pins controlled by the port C data (PTCD), data direction (PTCDD) and pullup enable (PTCPE) registers.
The eight PTCPEn control bits in the PTCPE register allow the user to select whether an internal pullup
device is enabled on each port C pin that is configured as a port input or a KBI2 input.
Any enabled keyboard interrupt can be used to wake the MCU from wait, standby (stop3), partial
power-down (stop2) or power-down modes (stop1). In either stop1 or stop2 mode, an input functions as a
falling edge/low-level wakeup, therefore it should be configured to use falling-edge sensing if the MCU
will be used in stop1 or stop2 modes.
Either KBI1 or KBI2 can be used to wake the MCU from wait or standby (stop3). Only KBI1 can be used
to wake the MCU from partial power down (stop2) or power down (stop1). When using KBI1 to wake up
from stop2 or stop1, the pins must be configured to use falling-edge/low-level sensing (KBEDG = 0). The
KBF bits for both KBI modules must be cleared before entering stop mode, regardless of whether the
interrupt is enabled.
Freescale Semiconductor
Introduction
The voltage measured on the pulled up PTA0 pin will be less than V
internal gates connected to this pin are pulled all the way to V
pins with enabled pullup resistors will have an unloaded measurement of
V
DD
.
chapter for more information about the logic and hardware aspects of these pins.
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
NOTE
DD
. All other
DD
. The
123