MC9S12XET256MAA Freescale Semiconductor, MC9S12XET256MAA Datasheet - Page 801
MC9S12XET256MAA
Manufacturer Part Number
MC9S12XET256MAA
Description
MCU 16BIT 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XET256MAA
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Package
80PQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
Quantity
Price
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22.3.2.8
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0008
Module Base + 0x0009
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
OMx
OLx
7:0
7:0
W
W
R
R
OM7
OM3
Output Mode — These eight pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OMx bits on timer port, the corresponding bit in OC7M should be cleared. For
Output Level — These eight pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OLx bits on timer port, the corresponding bit in OC7M should be cleared. For
Timer Control Register 1/Timer Control Register 2 (TCTL1/TCTL2)
0
0
7
7
an output line to be driven by an OCx the OCPDx must be cleared.
an output line to be driven by an OCx the OCPDx must be cleared.
OMx
OL7
OL3
0
0
6
6
0
0
1
1
Figure 22-14. Timer Control Register 1 (TCTL1)
Figure 22-15. Timer Control Register 2 (TCTL2)
Table 22-8. TCTL1/TCTL2 Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.23
Table 22-9. Compare Result Output Action
OM6
OM2
OLx
0
1
0
1
5
0
5
0
OL6
OL2
0
0
4
4
action on the timer output signal
Clear OCx output line to zero
Description
Set OCx output line to one
Toggle OCx output line
No output compare
Chapter 22 Timer Module (TIM16B8CV2) Block Description
OM5
OM1
Action
0
0
3
3
OL5
OL1
2
0
2
0
OM4
OM0
0
0
1
1
OL4
OL0
0
0
0
0
801
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