MC908AP64ACFAE Freescale Semiconductor, MC908AP64ACFAE Datasheet - Page 284

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MC908AP64ACFAE

Manufacturer Part Number
MC908AP64ACFAE
Description
IC MCU 64K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AP64ACFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Core
HC08
Processor Series
HC08AP
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Data Ram Size
2 KB
On-chip Adc
Yes
Number Of Programmable I/os
32
Number Of Timers
4
Mounting Style
SMD/SMT
Height
1.4 mm
Interface Type
SCI, SPI
Length
7 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908AP64ACFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908AP64ACFAE
Manufacturer:
FREESCALE
Quantity:
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Computer Operating Properly (COP)
19.7.1 Wait Mode
The COP remains active during wait mode. To prevent a COP reset during wait mode, periodically clear
the COP counter in a CPU interrupt routine.
19.7.2 Stop Mode
Stop mode turns off the ICLK input to the COP and clears the COP prescaler. Service the COP
immediately before entering or after exiting stop mode to ensure a full COP timeout period after entering
or exiting stop mode.
To prevent inadvertently turning off the COP with a STOP instruction, a configuration option is available
that disables the STOP instruction. When the STOP bit in the configuration register has the STOP
instruction is disabled, execution of a STOP instruction results in an illegal opcode reset.
19.8 COP Module During Break Mode
The COP is disabled during a break interrupt when V
is present on the RST pin.
TST
MC68HC908AP A-Family Data Sheet, Rev. 3
284
Freescale Semiconductor

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