MC908AP64ACFAE Freescale Semiconductor, MC908AP64ACFAE Datasheet - Page 66

• Manufacturer Part Number: MC908AP64ACFAE
• Description: IC MCU 64K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP64ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Core: HC08
• Processor Series: HC08AP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Mounting Style: SMD/SMT
• Height: 1.4 mm
• Interface Type: SCI, SPI
• Length: 7 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Width: 7 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Central Processor Unit (CPU)
66
PULH
PULX
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
ROL opr,SP
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
ROR opr,SP
RSP
RTI
RTS
SBC #opr
SBC opr
SBC opr
SBC opr,X
SBC opr,X
SBC ,X
SBC opr,SP
SBC opr,SP
SEC
SEI
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STA opr,SP
STA opr,SP
STHX opr
STOP
Source
Form
Pull H from Stack
Pull X from Stack
Rotate Left through Carry
Rotate Right through Carry
Reset Stack Pointer
Return from Interrupt
Return from Subroutine
Subtract with Carry
Set Carry Bit
Set Interrupt Mask
Store A in M
Store H:X in M
Enable Interrupts, Stop Processing,
Refer to MCU Documentation
Operation
MC68HC908AP A-Family Data Sheet, Rev. 3
Table 4-1. Instruction Set Summary
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
SP ← SP + 1; Pull (PCH)
SP ← SP + 1; Pull (PCL)
SP ← (SP + 1); Pull (H)
SP ← (SP + 1); Pull (X)
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
I ← 0; Stop Processing
C
b7
A ← (A) – (M) – (C)
(M:M + 1) ← (H:X)
Description
b7
SP ← $FF
M ← (A)
C ← 1
I ← 1
b0
b0
C
V H I N Z C
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – 1 INH
– – 1 – – – INH
0 – – ↕ ↕ –
0 – – ↕ ↕ – DIR
– – 0 – – – INH
↕ – – ↕ ↕ ↕
↕ – – ↕ ↕ ↕
↕ ↕ ↕ ↕ ↕ ↕ INH
↕ – – ↕ ↕ ↕
Effect on
CCR
DIR
INH
INH
IX1
IX
SP1
DIR
INH
INH
IX1
IX
SP1
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
EXT
IX2
IX1
IX
SP1
SP2
Freescale Semiconductor
9EE2
9ED2
9EE7
9ED7
9E69
9E66
8A
9C
A2
B2
C2
D2
E2
9B
B7
C7
D7
E7
8E
88
39
49
59
69
79
36
46
56
66
76
80
81
F2
99
F7
35
dd
ff
ff
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
hh ll
ee ff
ff
ff
ee ff
dd
2
2
4
1
1
4
3
5
4
1
1
4
3
5
1
7
4
2
3
4
4
3
2
4
5
1
2
3
4
4
3
2
4
5
4
1