MC9S12XEQ384CAL Freescale Semiconductor, MC9S12XEQ384CAL Datasheet - Page 889
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MC9S12XEQ384CAL
Manufacturer Part Number
MC9S12XEQ384CAL
Description
MCU 16BIT 384K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEQ384CAL
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
24 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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24.4.3
The Flash module can generate an interrupt when a Flash command operation has completed or when a
Flash command operation has detected an EEE error or an ECC fault.
24.4.3.1
The Flash module uses the CCIF flag in combination with the CCIE interrupt enable bit to generate the
Flash command interrupt request. The Flash module uses the ERSEIF, PGMEIF, EPVIOLIF, ERSVIF1,
ERSVIF0, DFDIF and SFDIF flags in combination with the ERSEIE, PGMEIE, EPVIOLIE, ERSVIE1,
ERSVIE0, DFDIE and SFDIE interrupt enable bits to generate the Flash error interrupt request. For a
detailed description of the register bits involved, refer to
(FCNFG)”,
Status Register
The logic used for generating the Flash module interrupts is shown in
Freescale Semiconductor
Flash Command Complete
Flash EEE Erase Error
Flash EEE Program Error
Flash EEE Protection Violation
Flash EEE Error Type 1 Violation
Flash EEE Error Type 0 Violation
ECC Double Bit Fault on Flash Read
ECC Single Bit Fault on Flash Read
Section 24.3.2.6, “Flash Error Configuration Register
Interrupts
Description of Flash Interrupt Operation
Vector addresses and their relative interrupt priority are determined at the
MCU level.
(FSTAT)”, and
Interrupt Source
MC9S12XE-Family Reference Manual , Rev. 1.23
Section 24.3.2.8, “Flash Error Status Register
Table 24-77. Flash Interrupt Sources
(FERSTAT register)
(FERSTAT register)
(FERSTAT register)
(FERSTAT register)
(FERSTAT register)
(FERSTAT register)
(FERSTAT register)
(FSTAT register)
Interrupt Flag
PGMERIF
EPVIOLIF
ERSERIF
ERSVIF1
ERSVIF0
DFDIF
SFDIF
CCIF
NOTE
Section 24.3.2.5, “Flash Configuration Register
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
(FERCNFG register)
(FERCNFG register)
(FERCNFG register)
(FERCNFG register)
(FERCNFG register)
(FERCNFG register)
(FERCNFG register)
(FCNFG register)
(FERCNFG)”,
Local Enable
PGMERIE
EPVIOLIE
ERSERIE
ERSVIE1
ERSVIE0
DFDIE
SFDIE
CCIE
Figure
24-27.
(FERSTAT)”.
Section 24.3.2.7, “Flash
Global (CCR)
Mask
I Bit
I Bit
I Bit
I Bit
I Bit
I Bit
I Bit
I Bit
889
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