DF2211CUNP24V Renesas Electronics America, DF2211CUNP24V Datasheet - Page 238
DF2211CUNP24V
Manufacturer Part Number
DF2211CUNP24V
Description
MCU 16BIT FLASH 3V 64K 64-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2218UTF24V.pdf
(758 pages)
Specifications of DF2211CUNP24V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
DF2211CUNP24V
Manufacturer:
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135
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Transfer requests (activation sources) consist of A/D conversion end interrupt, SCI transmission
complete and reception complete interrupts, and TPU channel 0 to 2 compare match/input capture
A interrupts. Figure 7.5 shows an example of the setting procedure for idle mode.
Rev.7.00 Dec. 24, 2008 Page 182 of 698
REJ09B0074-0700
and transfer destination
Set number of transfers
Set transfer source
Idle mode setting
Read DMABCRL
Set DMABCRH
Figure 7.5 Example of Idle Mode Setting Procedure
Set DMABCRL
Set DMACR
addresses
Idle mode
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set ech bit in DMABCRH.
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
destinatiln address in MAR and IOAR.
· Clear the FAE bit to 0 to select short address
· Specify enabling or disabling of internal
· Set the transfer data size with the DTSZ bit.
· Specify whether MAR is to be incremented or
· Set the RPE bit to 1.
· Specify the transfer direction with the DTDIR
· Select the activation source with bits DTF3 to
· Set the DTIE bit to 1.
· Set the DTE bit to 1 to enable transfer.
mode.
interrupt clearing with the DTA bit.
decremented with the DTID bit.
bit.
DTF0.
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