M30280F6HP#D5 Renesas Electronics America, M30280F6HP#D5 Datasheet - Page 61

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M30280F6HP#D5

Manufacturer Part Number
M30280F6HP#D5
Description
IC M16C MCU FLASH 48K 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#D5

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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R
R
M
e
E
1
. v
Figure 5.8 Low Voltage Detection Interrupt Generation Block
Figure 5.9 Low voltage Detection Interrupt Generation Circuit Operation Example
J
6
0
C
2
9
0 .
2 /
B
0
0
8
Low voltage detection circuit
V
Vref
0
Watchdog timer block
CC
4
G
J
VCC
Low voltage detection
interrupt signal
VC13 bit
Output of the digital filter
D42 bit
NOTES:
7
a
o r
0 -
. n
VC27
+
-
(Rejection wide:200 ns)
1. D40 bit in the D4INT register is set to “1”(low voltage detection interrupt enabled).
2. Output of the digital filter shown in Figure 5.8.
u
2
3
p
0
, 1
0
(
Noise
rejection
M
2
0
1
0
6
7
WAIT instruction(wait mode)
C
“H” when VC27 bit= 0
(disabled)
2 /
Watchdog timer
underflow signal
, 8
page 39
(2)
M
1
Low voltage detection
signal
D4INT clock(the
clock with which it
operates also in
wait mode)
6
VC13
CM10
CM02
C
f o
2 /
8
3
) B
8
5
Low voltage detection interrupt generation circuit
1/8
sampling
This bit is set to “0”(not detected) by writing a “0” by program.
D43
1/2
1/2
Noise rejection
circuit
1/2
sampling
00
01
10
11
2
2
2
2
DF1, DF0
D41
Digital
filter
No low voltage detection interrupt signals are
generated when the D42 bit is “1”.
D42 bit is set to “0”(not detected) by
writing a “0” in a program. VC27 bit
is set to “0” (low voltage detection
circuit disabled), the D42 bit is set to
“0”.
D42
Set to “0” by
program
detected)
sampling
D40
(not
Watchdog
timer interrupt
signal
Oscillation stop,
re-oscillation
detection
interrupt signal
Low voltage
detection
interrupt signal
Set to “0” by a
program
detected)
sampling
(not
Non-maskable
interrupt signal
5. Reset

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