C8051F067-GQ Silicon Laboratories Inc, C8051F067-GQ Datasheet - Page 244

• Manufacturer Part Number: C8051F067-GQ
• Description: IC 8051 MCU 32K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F067-GQ

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F060DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit, 1 Channel
• On-chip Dac: 12 bit, 2 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1222

C8051F060/1/2/3/4/5/6/7
20.4.2. Clock Rate Register
244
Bits7-0:
R/W
Bit7
SMB0CR.[7:0]: SMBus0 Clock Rate Preset.
The SMB0CR Clock Rate register controls the frequency of the serial clock SCL in master
mode. The 8-bit word stored in the SMB0CR Register preloads a dedicated 8-bit timer. The
timer counts up, and when it rolls over to 0x00, the SCL logic state toggles.
The SMB0CR setting should be bounded by the following equation , where SMB0CR is the
unsigned 8-bit value in register SMB0CR, and SYSCLK is the system clock frequency in Hz:
The resulting SCL signal high and low times are given by the following equations:
Using the same value of SMB0CR from above, the Bus Free Timeout period is given in the
following equation:
R/W
Bit6
SMB0CR
Figure 20.9. SMB0CR: SMBus0 Clock Rate Register
T
R/W
T
Bit5
HIGH
BFT

T
 
LOW
288


10

258 SMB0CR
=
R/W
–
Bit4


0.85

---------------------------------------------------- -
256 SMB0CR
–
256 SMB0CR

–
–
SYSCLK 
Rev. 1.2
SYSCLK
R/W
Bit3
 SYSCLK

 SYSCLK




R/W
Bit2
+
1.125 10
1
+

625ns
R/W
Bit1
6
 
SFR Address:
SFR Page:
R/W
Bit0
0xCF
0
Reset Value
00000000