M30281F6HP#U5B Renesas Electronics America, M30281F6HP#U5B Datasheet - Page 394

• Manufacturer Part Number: M30281F6HP#U5B
• Description: IC M16C/28 MCU FLASH 48K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30281F6HP#U5B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
20.11 Programmable I/O Ports
e
E
1
. v
J
6
0
C
2
9
2 /
1. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
2. The input threshold voltage of pins differs between programmable input/output ports and peripheral
3. When the SM32 bit in the S3C register is set to "1", the P3
4. When the INV03 bit in the INVC0 register is "1"(three-phase motor control timer output enabled), an "L"
0 .
B
0
0
(three-phase output forcible cutoff by input on SD pin enabled), the P7
a high-impedance state.
functions.
Therefore, if any pin is shared by a programmable input/output port and a peripheral function and the
input level at this pin is outside the range of recommended operating conditions V
“high” nor “low”), the input level may be determined differently depending on which side—the program-
mable input/output port or the peripheral function—is currently selected.
the SM42 bit in the S4C register is set to "1", the P9
input on the P8
Therefore, the P8
When the SD function isn't used, set to "0" (Input) in PD8
outside.
8
0
G
4
J
7
a
o r
0 -
. n
•When the TB2SC register IVPCR1 bit is set to “1” (three-phase output forcible cutoff by input on
•When the TB2SC register IVPCR1 bit is set to “0” (three-phase output forcible cutoff by input on
u
SD pin enabled), the U/ U/ V/ V/ W/ W pins go to a high-impedance state.
SD pin disabled), the U/ U/ V/ V/ W/ W pins go to a normal port.
_____
_____
2
3
p
0
, 1
0
(
M
_____
2
0
1
0
6
7
C
5
2 /
_______ _____
/NMI/SD pin, has the following effect.
page 372
5
, 8
pin can not be used as programmable I/O port when the INV03 bit is set to "1".
M
1
6
C
2 /
f o
8
3
) B
8
__
__
5
__
__
_____
___
___
_____
6
pin goes to high-imepdance state.
5
and pullup to "H" in the P8
2
pin goes to high-impedance state. When
2
to P7
5
, P8
0
and P8
IH
5
_______ _____
/NMI/SD pin from
and V
20. Precautions
1
IL
pins go to
(neither