MCF52259CAG80 Freescale Semiconductor, MCF52259CAG80 Datasheet - Page 10

• Manufacturer Part Number: MCF52259CAG80
• Description: MCU 32BIT COLDFIRE V2 144LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF5225xr

Specifications of MCF52259CAG80

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MCF522x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C/QSPI/UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 10
• Operating Supply Voltage: - 0.3 V to + 4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF5225X, TWR-SENSOR-PAK, TWR-SER, TWR-ELEV, TOWER, M52259EVB, M52259DEMOKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• For Use With: M52259DEMOKIT - BOARD KIT DEMO MCF5225X LOW COSTM52259EVB - BOARD EVAL FOR 52259 COLDFIRE V2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1.2.5
1.2.5.1
The dual-ported SRAM module provides a general-purpose 64-Kbyte memory block that the ColdFire core can access in a
single cycle. The location of the memory block can be set to any 64-Kbyte boundary within the 4-Gbyte address space. This
memory is ideal for storing critical code or data structures and for use as the system stack. Because the SRAM module is
physically connected to the processor's high-speed local bus, it can quickly service core-initiated accesses or
memory-referencing commands from the debug module.
The SRAM module is also accessible by the DMA, FEC, and USB. The dual-ported nature of the SRAM makes it ideal for
implementing applications with double-buffer schemes, where the processor and a DMA device operate in alternate regions of
the SRAM to maximize system performance.
1.2.5.2
The ColdFire flash module (CFM) is a non-volatile memory (NVM) module that connects to the processor’s high-speed local
bus. The CFM is constructed with four banks of 64-Kbyte16-bit flash memory arrays to generate 512 Kbytes of 32-bit flash
memory. These electrically erasable and programmable arrays serve as non-volatile program and data memory. The flash
memory is ideal for program and data storage for single-chip applications, allowing for field reprogramming without requiring
an external high voltage source. The CFM interfaces to the ColdFire core through an optimized read-only memory controller
that supports interleaved accesses from the 2-cycle flash memory arrays. A backdoor mapping of the flash memory is used for
all program, erase, and verify operations, as well as providing a read datapath for the DMA. Flash memory may also be
programmed via the EzPort, which is a serial flash memory programming interface that allows the flash memory to be read,
erased and programmed by an external controller in a format compatible with most SPI bus flash memory chips.
1.2.6
The MCF52235 device incorporates two hardware accelerators for cryptographic functions. First, the CAU is a coprocessor
tightly-coupled to the V2 ColdFire core that implements a set of specialized operations to increase the throughput of
software-based encryption and message digest functions, specifically the DES, 3DES, AES, MD5 and SHA-1 algorithms.
Second, a random number generator provides FIPS-140 compliant 32-bit values to security processing routines. Both modules
supply critical acceleration to software-based cryptographic algorithms at a minimal hardware cost.
1.2.7
The device incorporates several low-power modes of operation entered under program control and exited by several external
trigger events. An integrated power-on reset (POR) circuit monitors the input supply and forces an MCU reset as the supply
voltage rises. The low voltage detector (LVD) monitors the supply voltage and is configurable to force a reset or interrupt
condition if it falls below the LVD trip point. The RAM standby switch provides power to RAM when the supply voltage to the
chip falls below the standby battery voltage.
1.2.8
The FlexCAN module is a communication controller implementing version 2.0 of the CAN protocol parts A and B. The CAN
protocol can be used as an industrial control serial data bus, meeting the specific requirements of reliable operation in a harsh
EMI environment with high bandwidth. This instantiation of FlexCAN has 16 message buffers.
Freescale Semiconductor
On-Chip Memories
Cryptographic Acceleration Unit
Power Management
FlexCAN
SRAM
Flash Memory
MCF52259 ColdFire Microcontroller, Rev. 4
Family Configurations
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