MCF52259CAG80 Freescale Semiconductor, MCF52259CAG80 Datasheet - Page 6

MCU 32BIT COLDFIRE V2 144LQFP

MCF52259CAG80

Manufacturer Part Number
MCF52259CAG80
Description
MCU 32BIT COLDFIRE V2 144LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5225xr
Datasheet

Specifications of MCF52259CAG80

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C/QSPI/UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
96
Number Of Timers
10
Operating Supply Voltage
- 0.3 V to + 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF5225X, TWR-SENSOR-PAK, TWR-SER, TWR-ELEV, TOWER, M52259EVB, M52259DEMOKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
For Use With
M52259DEMOKIT - BOARD KIT DEMO MCF5225X LOW COSTM52259EVB - BOARD EVAL FOR 52259 COLDFIRE V2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Freescale Semiconductor
— DMA or FIFO data stream interfaces
— Low power consumption
— OTG protocol logic
Fast Ethernet controller (FEC)
— 10/100 BaseT/TX capability, half duplex or full duplex
— On-chip transmit and receive FIFOs
— Built-in dedicated DMA controller
— Memory-based flexible descriptor rings
Mini-FlexBus
— External bus interface available on 144 pin packages
— Supports glueless interface with 8-bit ROM/flash/SRAM/simple slave peripherals. Can address up to 2 Mbytes of
— 2 chip selects (FB_CS[1:0])
— Non-multiplexed mode: 8-bit dedicated data bus, 20-bit address bus
— Multiplexed mode: 16-bit data and 20-bit address bus
— FB_CLK output to support synchronous memories
— Programmable base address, size, and wait states to support slow peripherals
— Operates at up to 40 MHz (bus clock) in 1:2 mode or up to 80 MHz (core clock) in 1:1 mode
Three universal asynchronous/synchronous receiver transmitters (UARTs)
— 16-bit divider for clock generation
— Interrupt control logic with maskable interrupts
— DMA support
— Data formats can be 5, 6, 7 or 8 bits with even, odd, or no parity
— Up to two stop bits in 1/16 increments
— Error-detection capabilities
— Modem support includes request-to-send (RTS) and clear-to-send (CTS) lines for two UARTs
— Transmit and receive FIFO buffers
Two I
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and keypads
— Fully compatible with industry-standard I
— Master and slave modes support multiple masters
— Automatic interrupt generation with programmable level
Queued serial peripheral interface (QSPI)
— Full-duplex, three-wire synchronous transfers
— Up to three chip selects available
— Master mode operation only
— Programmable bit rates up to half the CPU clock frequency
— Up to 16 pre-programmed transfers
Fast analog-to-digital converter (ADC)
— Eight analog input channels
— 12-bit resolution
— Minimum 1.125 s conversion time
— Simultaneous sampling of two channels for motor control applications
— Single-scan or continuous operation
— Optional interrupts on conversion complete, zero crossing (sign change), or under/over low/high limit
addresses
2
C modules
MCF52259 ColdFire Microcontroller, Rev. 4
2
C bus
Family Configurations
6

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