MC68HC11K1CFUE3 Freescale Semiconductor, MC68HC11K1CFUE3 Datasheet - Page 87

MCU 8-BIT 768 RAM 3MHZ 80-QFP

MC68HC11K1CFUE3

Manufacturer Part Number
MC68HC11K1CFUE3
Description
MCU 8-BIT 768 RAM 3MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11K1CFUE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Type
ROMless
Eeprom Size
640 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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4.6.2 ROM or EPROM
4.6.3 EEPROM
M68HC11K Family
MOTOROLA
NOTE:
The presence and location of the 24-Kbyte (EP)ROM on the [7]11K4 is
determined by two bits in the system configuration register (CONFIG).
The CONFIG register is a special EEPROM register (see
(EP)ROM is present in the memory map when the ROMON bit is set and
removed from the memory map when the bit is cleared. The default
location of this memory is $A000–$FFFF, but it can be moved to
$2000–$7FFF in expanded mode by clearing the ROMAD bit. Both bits
are set out of reset in single-chip mode.
In special test mode, the ROMON bit is forced to 0, removing (EP)ROM
from the memory map.
The M68HC11K Family devices contain 640 bytes of EEPROM. It is
initially located at $0D80 after reset if it is enabled by the EEON bit in the
CONFIG register (see
boundary ($xD80) by writing to the EEPROM mapping register (INIT2)
(see
On the M68HC11K devices, the EEPROM can be mapped to where it
will contain the vector space.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure
On the [7]11KS2, (EP)ROM is 32 K, mapped to $8000–$FFFF by
default, and moved to $0000–$7FFF by clearing the ROMAD bit.
Operating Modes and On-Chip Memory
Go to: www.freescale.com
4-7).
Figure
4-6). It can be relocated to any 4-K
Operating Modes and On-Chip Memory
Figure
Technical Data
Memory Map
4-6).
87

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