DF2370RVFQ34V Renesas Electronics America, DF2370RVFQ34V Datasheet - Page 930
![IC H8S/2370 MCUFLSH 256K 144LQFP](/photos/12/41/124197/df2370rvfq34v_sml.jpg)
DF2370RVFQ34V
Manufacturer Part Number
DF2370RVFQ34V
Description
IC H8S/2370 MCUFLSH 256K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2370RVFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2370RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 930 of 1208
- Download datasheet (8Mb)
Section 21 Flash Memory (0.18-μm F-ZTAT Version)
• Programming/erasing time
• Number of programming
• Three on-board programming modes and one off-board programming mode
• One off-board programming mode
• Programming/erase protection
Rev.7.00 Mar. 18, 2009 page 862 of 1136
REJ09B0109-0700
The flash memory programming time is 1 ms (typ) in 128-byte simultaneous programming and
8 µs per byte. The erasing time is 750 ms (typ) per 64-kbyte block.
⎯ User branch
The number of flash memory programming can be up to 100 times.
⎯ Boot mode
⎯ User program mode
⎯ User boot mode
⎯ PROM mode
There are three types of flash memory programming/erase protection that may be selected:
hardware protection, software protection, and error protection.
The program processing is performed in 128-byte units. It consists the program pulse
application, verify read, and several other steps. Erasing is performed in one divided-block
units and consists of several steps. The user processing routine can be executed between
the steps, this setting for which is called the use branch addition.
This mode is a program mode that uses an on-chip SCI interface. The user MAT and user
boot MAT can be programmed. This mode can automatically adjust the bit rate between
host and this LSI.
The user MAT can be programmed by using the optional interface.
The user boot program of the optional interface can be made and the user MAT can be
programmed.
This mode uses the PROM programmer. The user MAT and user boot MAT can be
programmed.
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