HD64F2239FA16 Renesas Electronics America, HD64F2239FA16 Datasheet - Page 684

IC H8S MCU FLASH 384K 100-QFP

HD64F2239FA16

Manufacturer Part Number
HD64F2239FA16
Description
IC H8S MCU FLASH 384K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of HD64F2239FA16

Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239FA16V
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
HD64F2239FA16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 15 Serial Communication Interface (SCI)
15.9
15.9.1
Table 15.12 shows the interrupt sources in normal serial communication interface mode. A
different interrupt vector is assigned to each interrupt source, and individual interrupt sources can
be enabled or disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated.
A TXI interrupt can activate the DTC to perform data transfer. The TDRE flag is cleared to 0
automatically when data is transferred by the DMAC *
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated.
An RXI interrupt request can activate the DMAC *
is cleared to 0 automatically when data is transferred by the DMAC *
A TEI interrupt is requested when the TEND flag is set to 1 and the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for
acceptance. However, if the TDRE and TEND flags are cleared simultaneously by the TXI
interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Notes: 1. Supported only by the H8S/2239 Group.
Rev. 6.00 Mar. 18, 2010 Page 622 of 982
REJ09B0054-0600
2. The flag is cleared only when DISEL in DTC is 0 with the transfer counter not being 0.
Interrupt Sources
Interrupts in Normal Serial Communication Interface Mode
1
or the DTC *
1
or the DTC *
2
to transfer data. The RDRF flag
2
.
1
or the DTC *
2
.

Related parts for HD64F2239FA16