HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 119
HD64F2633RTE28
Manufacturer Part Number
HD64F2633RTE28
Description
IC H8S MCU FLASH 256K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet
1.D12312SVTE25V.pdf
(341 pages)
Specifications of HD64F2633RTE28
Core Processor
H8S/2600
Core Size
16-Bit
Speed
28MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
73
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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2.2.27 (2)
DIVXS (DIVide eXtend as Signed)
Operation
ERd
Assembly-Language Format
DIVXS.W Rs, ERd
Operand Size
Word
Description
This instruction divides the contents of a 32-bit register ERd (destination operand) by the contents
of a 16-bit register Rs (source operand) and stores the result in the 32-bit register ERd. The
division is signed. The operation performed is 32 bits
remainder. The quotient is placed in the lower 16 bits (Rd) of the 32-bit register ERd. The
remainder is placed in the upper 16 bits (Ed). The sign of the remainder matches the sign of the
dividend.
Valid results are not assured if division by zero is attempted or an overflow occurs.
Available Registers
ERd: ER0 to ER7
Rs:
R0 to R7, E0 to E7
Rs
DIVXS (W)
ERd
Dividend
32 bits
ERd
Divisor
16 bits
Rs
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the quotient is negative;
Z: Set to 1 if the divisor is zero; otherwise
V: Previous value remains unchanged.
C: Previous value remains unchanged.
16 bits
otherwise cleared to 0.
cleared to 0.
Remainder
Rev. 4.00 Feb 24, 2006 page 103 of 322
—
I
16 bits
UI H
—
Section 2 Instruction Descriptions
ERd
16-bit quotient and 16-bit
—
Quotient
16 bits
—
U
N
REJ09B0139-0400
Z
Divide Signed
— —
V
C
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