HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 189
HD64F2633RTE28
Manufacturer Part Number
HD64F2633RTE28
Description
IC H8S MCU FLASH 256K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet
1.D12312SVTE25V.pdf
(341 pages)
Specifications of HD64F2633RTE28
Core Processor
H8S/2600
Core Size
16-Bit
Speed
28MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
73
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number:
HD64F2633RTE28V
Manufacturer:
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2.2.51 (3)
ROTL (ROTate Left)
Operation
Rd (left rotation)
Assembly-Language Format
ROTL.W Rd
Operand Size
Word
Description
This instruction rotates the bits in a 16-bit register Rd (destination operand) one bit to the left. The
most significant bit (bit 15)is rotated to the least significant bit (bit 0), and also copied to the carry
flag.
Available Registers
Rd: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Notes
Register direct
Addressing
Mode
ROTL (W)
Mnemonic
ROTL.W
Rd
C
Operands
MSB
b15
Rd
1st byte
. . . . . .
1
2
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 15.
2nd byte
9
Instruction Format
cleared to 0.
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 173 of 322
—
I
rd
UI H
—
Section 2 Instruction Descriptions
—
3rd byte
LSB
b0
—
U
N
4th byte
REJ09B0139-0400
Z
V
0
States
No. of
C
Rotate
1
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