DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 294
DF2367VF33V
Manufacturer Part Number
DF2367VF33V
Description
IC H8S/2367 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2368VTE34V.pdf
(1044 pages)
Specifications of DF2367VF33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Quantity
Price
Company:
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
DF2367VF33V
Manufacturer:
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Quantity:
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Section 2 Instruction Descriptions
2.6
The tables in this section can be used to calculate the number of states required for instruction
execution by the CPU. Table 2.5 indicates the number of instruction fetch, data read/write, and
other cycles occurring in each instruction. Table 2.4 indicates the number of states required for
each cycle, depending on its size. The number of states required for each cycle depends on the
product. See the hardware manual named for the relevant product for details. The number of states
required for execution of an instruction can be calculated from these two tables as follows:
Examples: Advanced mode, program code and stack located in external memory, on-chip
supporting modules accessed in two states with 8-bit bus width, external devices accessed in three
states with one wait state and 16-bit bus width.
1. BSET #0, @FFFFC7:8
2. JSR @@30
Rev. 4.00 Feb 24, 2006 page 278 of 322
REJ09B0139-0400
From table 2.5:
From table 2.4:
Number of states required for execution = 2
From table 2.5:
From table 2.4:
Number of states required for execution = 2
Execution states = I
I = L = 2,
S
I = J = K = 2,
S
Number of States Required for Instruction Execution
I
I
= 4,
= S
J
= S
S
K
L
= 4
= 2
J = K = M = N= 0
L = M = N = 0
S
I
+ J S
J
+ K
S
K
+ L
4 + 2
4 + 2
S
L
+ M
2 = 12
4 + 2
S
M
4 = 24
+ N
S
N
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