DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 333

• Manufacturer Part Number: DF2367VF33V
• Description: IC H8S/2367 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2367VF33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.1
The CPU is driven by a system clock, denoted by the symbol . The period from one rising edge
of to the next is referred to as a “state.” The memory cycle or bus cycle consists of one, two, or
three states. Different methods are used to access on-chip memory, on-chip supporting modules,
and the external address space. Refer to the relevant microcontroller hardware manual for details.
4.2
On-chip memory is accessed in one state. The data bus is 16 bits wide, permitting both byte and
word access. Figure 4.1 shows the on-chip memory access cycle. Figure 4.2 shows the pin states.
On-Chip Memory (ROM, RAM)
Overview
Internal address bus
Read
access
Write
access
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Figure 4.1 On-Chip Memory Access Cycle
Section 4 Basic Timing
Bus cycle
Rev. 4.00 Feb 24, 2006 page 317 of 322
Address
T1
Read data
Write data
Section 4 Basic Timing
REJ09B0139-0400