DF2376VFQ33V Renesas Electronics America, DF2376VFQ33V Datasheet - Page 439
![IC H8S/2376 MCU FLASH 144LQFP](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
DF2376VFQ33V
Manufacturer Part Number
DF2376VFQ33V
Description
IC H8S/2376 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2376VFQ33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
30K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2376VFQ33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 439 of 1208
- Download datasheet (8Mb)
Bit
12
11
10
9
8
Bit Name
SARA4
SARA3
SARA2
SARA1
SARA0
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Source Address Repeat Area
These bits specify the source address (EDSAR)
repeat area. The repeat area function updates the
specified lower address bits, leaving the remaining
upper address bits always the same. A repeat area
size of 2 bytes to 8 Mbytes can be specified. The
setting interval is a power-of-two number of bytes.
When repeat area overflow results from
incrementing or decrementing an address, the
lower address is the start address of the repeat
area in the case of address incrementing, or the
last address of the repeat area in the case of
address decrementing. If the SARIE bit is set to 1,
an interrupt can be requested when repeat area
overflow occurs.
00000: Not designated as repeat area
00001: Lower 1 bit (2-byte area) designated as
00010: Lower 2 bits (4-byte area) designated as
00011: Lower 3 bits (8-byte area) designated as
00100: Lower 4 bits (16-byte area) designated as
10011: Lower 19 bits (512-kbyte area) designated
10100: Lower 20 bits (1-Mbyte area) designated as
10101: Lower 21 bits (2-Mbyte area) designated as
10110: Lower 22 bits (4-Mbyte area) designated as
10111: Lower 23 bits (8-Mbyte area) designated as
11×××: Setting prohibited
repeat area
repeat area
repeat area
repeat area
as repeat area
repeat area
repeat area
repeat area
repeat area
Rev.7.00 Mar. 18, 2009 page 371 of 1136
:
Section 8 EXDMA Controller (EXDMAC)
:
REJ09B0109-0700
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