M30620FCAFP#D3 Renesas Electronics America, M30620FCAFP#D3 Datasheet - Page 71
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M30620FCAFP#D3
Manufacturer Part Number
M30620FCAFP#D3
Description
IC M16C MCU FLASH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCAFP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Interrupt
1-50
Table 1.11.2. Interrupts assigned to the variable vector tables and addresses of vector tables
Note 1: Address relative to address in interrupt table register (INTB).
Note 2: It is selected by interrupt request cause bit (bit 6, 7 in address 035F
Note 3: When IIC mode is selected, NACK and ACK interrupts are selected.
Software interrupt number 0
Software interrupt number 4
Software interrupt number 5
Software interrupt number 6
Software interrupt number 7
Software interrupt number 8
Software interrupt number 9
Software interrupt number 10
Software interrupt number 11
Software interrupt number 12
Software interrupt number 13
Software interrupt number 14
Software interrupt number 15
Software interrupt number 16
Software interrupt number 17
Software interrupt number 18
Software interrupt number 19
Software interrupt number 20
Software interrupt number 21
Software interrupt number 22
Software interrupt number 23
Software interrupt number 24
Software interrupt number 25
Software interrupt number 26
Software interrupt number 27
Software interrupt number 28
Software interrupt number 29
Software interrupt number 30
Software interrupt number 31
Software interrupt number 32
Software interrupt number 63
Software interrupt number
• Variable vector tables
The addresses in the variable vector table can be modified, according to the user’s settings. Indicate
the first address using the interrupt table register (INTB). The 256-byte area subsequent to the ad-
dress the INTB indicates becomes the area for the variable vector tables. One vector table comprises
four bytes. Set the first address of the interrupt routine in each vector table. Table 1.11.2 shows the
interrupts assigned to the variable vector tables and addresses of vector tables.
to
Address (L) to address (H)
+100 to +103 (Note 1)
+104 to +107 (Note 1)
+108 to +111 (Note 1)
+112 to +115 (Note 1)
+116 to +119 (Note 1)
+120 to +123 (Note 1)
+124 to +127 (Note 1)
+128 to +131 (Note 1)
+252 to +255 (Note 1)
Vector table address
+40 to +43 (Note 1)
+44 to +47 (Note 1)
+48 to +51 (Note 1)
+52 to +55 (Note 1)
+56 to +59 (Note 1)
+60 to +63 (Note 1)
+64 to +67 (Note 1)
+68 to +71 (Note 1)
+72 to +75 (Note 1)
+76 to +79 (Note 1)
+80 to +83 (Note 1)
+84 to +87 (Note 1)
+88 to +91 (Note 1)
+92 to +95 (Note 1)
+96 to +99 (Note 1)
+16 to +19 (Note 1)
+20 to +23 (Note 1)
+24 to +27 (Note 1)
+28 to +31 (Note 1)
+32 to +35 (Note 1)
+36 to +39 (Note 1)
+0 to +3 (Note 1)
to
Bus collision detection
Key input interrupt
UART2 receive/ACK (Note 3)
UART0 transmit
UART1 receive
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
INT0
BRK instruction
INT3
Timer B5
Timer B4
Timer B3
SI/O4/INT5
SI/O3/INT4
DMA0
DMA1
A-D
UART2 transmit/NACK (Note 3)
UART0 receive
UART1 transmit
INT2
Software interrupt
INT1
Interrupt source
(Note 2)
(Note 2)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
).
Cannot be masked I flag
Cannot be masked I flag
Remarks
M16C / 62A Group
Mitsubishi microcomputers
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