MAXQ7667AACM/V+T Maxim Integrated Products, MAXQ7667AACM/V+T Datasheet - Page 17

• Manufacturer Part Number: MAXQ7667AACM/V+T
• Description: IC MCU-BASED DAS 16BIT 48-LQFP
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ7667AACM/V+T

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 16
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Ram Size: 2K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 2.75 V
• Data Converters: A/D 5x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: MAXQ7667
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: UART, JTAG, LIN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MAXQ7667EVKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

The LNA provides a 40V/V fixed gain to the input signal.
The differential inputs of the LNA are ECHOP and
ECHON. For proper biasing of the LNA, AC-couple the
transducer or any external circuitry to ECHOP and
ECHON. For a single-ended input signal, AC-couple the
signal to ECHOP with a 0.01µF capacitor and connect
ECHON to AGND through a 0.01µF capacitor placed as
close as possible to the signal source. The outputs of the
LNA connect to the inputs of a 16-bit sigma-delta ADC
and can connect internally to the AIN0 and AIN1 inputs
of the SAR ADC for external monitoring (Figure 2).
Figure 2. Echo Receive Path
ECHOP
ECHON
*R = ECHO INPUT RESISTANCE. SEE THE ELECTRICAL CHARACTERISTICS SECTION.
0V
MUX
2mV
P-P
AVDD/2
______________________________________________________________________________________
R*
R*
RCVC[7:6]:LNAISEL[1:0]
RCVC.8:LNAOSEL
Ultrasonic Distance-Measuring System
40R*
40R*
LNA
Low-Noise Amplifier (LNA)
APE.12:BGE
16-Bit, RISC, Microcontroller-Based,
MAXQ7667
TO SAR ADC
AIN0
Echo Receive Path
AIN1
RCVC[4:0]:RCVGN[4:0]
APE.13:RSARE
RECEIVE
BANDGAP REF
CLOCK
ECHO
GAIN SIGMA-
DELTA ADC
VARIABLE
AGND
2.5V
0.47µF
REFGB
TO EXTERNAL VOLTAGE
CONTROL
BPFI[15:0]
CLOCK
REFERENCE
0.47µF
REF
BANDPASS
LPFC[15:12]:FFIL[3:0]
LPFC[2.0]:FFLS[2:0]
AGND
FILTER
An analog multiplexer located at the input of the LNA
selects one of three possible signals for processing by
the echo receive path; the normal echo signal AC-cou-
pled to the ECHOP and ECHON inputs, 0V signal, or a
2mV
2mV
cycle matching the burst signal, allows the echo
receive chain to process a simulated echo.
BPFO[15:0]
LPFC.3:FFLD
TIMER 0
TIMER 1
TIMER 2
P-P
P-P
ASR.1:LPFRDY
CMPC[14:0]:CMPH[14:0]
LOWPASS FILTER
RECTIFIER PLUS
square-wave signal, with frequency and duty
FULL-WAVE
internally generated signal (Figure 2). The
CMPC.15:CMPP
CONTROL
CMPT[15:0]
AIE.1:LPFIE
FIFO
AIE.2:LFLIE
DATA READY
INTERRUPT
LPFC[11:8]:FFDP[3:0]
LPFD[15:0]
8 x 16
FIFO
LPFC.7:FFOV
ASR.2:LPFFL
AIE.3:CMPIE
ASR.12:CMPLVL
LPFF[15:0]
Diagnostic Signals
ASR.3:CMPI
17