MAXQ7667AACM/V+T Maxim Integrated Products, MAXQ7667AACM/V+T Datasheet - Page 20
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MAXQ7667AACM/V+T
Manufacturer Part Number
MAXQ7667AACM/V+T
Description
IC MCU-BASED DAS 16BIT 48-LQFP
Manufacturer
Maxim Integrated Products
Series
MAXQ™r
Datasheet
1.MAXQ7667AACMV.pdf
(40 pages)
Specifications of MAXQ7667AACM/V+T
Core Processor
RISC
Core Size
16-Bit
Speed
16MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
16
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 2.75 V
Data Converters
A/D 5x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
MAXQ7667
Core
RISC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
UART, JTAG, LIN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MAXQ7667EVKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
16-Bit, RISC, Microcontroller-Based,
Ultrasonic Distance-Measuring System
Figures 6 and 7 show the equivalent input circuit of the
MAXQ7667 analog input architecture. During acquisi-
tion (track), a sampling capacitor charges to the posi-
tive input voltage at AIN0–AIN4 in single-ended mode
or AIN0 and AIN2 in differential mode while a second
sampling capacitor connects to AGND in single-ended
mode or AIN1 and AIN3 in differential mode. The ADC
conversion start source and the ADC dual mode selec-
tion bits control the T/H timing.
The MAXQ7667 supports three possible voltage refer-
ence sources for ADC conversion; 2.5V internal
buffered bandgap reference, external source, and
AVDD. The internal 2.5V bandgap reference has high
initial accuracy and temperature coefficient of typically
less than 100ppm/°C. When operating in internal refer-
ence mode, either the buffered output of the internal
reference or AVDD connects to the SAR ADC while the
buffered output of the internal reference connects to the
sigma-delta ADC. When operating in external reference
mode, an external source ranging between 1V and
V
Figure 6. Equivalent Input Circuit (Track/Acquisition Mode)
20
AVDD
AIN+
AIN-
______________________________________________________________________________________
applied at either the REF or REFBG inputs pro-
SAR ADC Analog Input Track-and-Hold (T/H)
AVDD
AGND
C
C
IN+
IN-
Voltage Reference
R
R
IN+
IN-
vides the reference to the SAR ADC and sigma-delta
ADC. Bypass REFBG and REF to AGND with a 0.47µF
capacitor for optimum performance. See Section 14 of
the MAXQ7667 User’s Guide .
The MAXQ7667’s schedule timer provides general time-
keeping and software synchronization to an external I/O.
The schedule timer features include the following:
Figure 8 shows a simplified block diagram of the
schedule timer.
Figure 7. Equivalent Input Circuit (Hold/Conversion Mode)
• 16-bit autoreload up-counter for the timer
• Programmable 16-bit alarm register
• Alarm interrupts
• Schedule timer incremented by a programmable
• Schedule timer up-counter resettable through an
• Wake-up alarm to pull the system clock from stop-
AIN+
AIN-
system clock prescaler (1, 1/2, 1/4, 1/8, 1/16, 1/32,
1/64, 1/128)
external I/O pin, which allows synchronization of a
schedule timer to an external event
mode to normal operation
AVDD
AGND
C
C
IN+
IN-
Schedule Timer
R
R
IN+
IN-