SAK-XE167FM-72F80L AA Infineon Technologies, SAK-XE167FM-72F80L AA Datasheet - Page 129
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SAK-XE167FM-72F80L AA
Manufacturer Part Number
SAK-XE167FM-72F80L AA
Description
IC MCU 16BIT FLASH 144-LQFP
Manufacturer
Infineon Technologies
Series
XE16xr
Datasheet
1.SAF-XE167KM-48F80L_AA.pdf
(140 pages)
Specifications of SAK-XE167FM-72F80L AA
Core Processor
C166SV2
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
576KB (576K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, UART, SPI, I2S
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
119
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000628636
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Table 35
Parameter
Master Mode Timing
Slave select output SELO active
to first SCLKOUT transmit edge
Slave select output SELO inactive
after last SCLKOUT receive edge
Transmit data output valid time
Receive data input setup time to
SCLKOUT receive edge
Data input DX0 hold time from
SCLKOUT receive edge
Slave Mode Timing
Select input DX2 setup to first
clock input DX1 transmit edge
Select input DX2 hold after last
clock input DX1 receive edge
Data input DX0 setup time to
clock input DX1 receive edge
Data input DX0 hold time from
clock input DX1 receive edge
Data output DOUT valid time
1) The maximum value further depends on the settings for the slave select output leading delay.
2)
3) The maximum value depends on the settings for the slave select output trailing delay and for the shift clock
4) These input timings are valid for asynchronous input signal handling of slave select input, shift clock input, and
Data Sheet
t
output delay.
receive data input (bits DXnCR.DSEN = 0).
SYS
= 1/
f
SYS
(= 12.5 ns @ 80 MHz)
SSC Master/Slave Mode Timing for Lower Voltage Range
Symbol
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
10
11
12
13
14
XE167FM, XE167GM, XE167HM, XE167KM
CC
CC
CC
SR
SR
SR
SR
SR
SR
CC
129
XE166 Family Derivatives / Base Line
Min.
t
- 10
t
- 9
-7
40
-5
7
7
7
5
8
SYS
SYS
Values
Typ.
–
–
–
–
–
–
–
–
–
–
Max.
1)
3)
11
–
–
–
–
–
–
41
Electrical Parameters
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V2.0, 2009-03
Test Co
ndition
2)
2)
4)
4)
4)
4)
4)
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