SAF-XE167F-96F80L AC Infineon Technologies, SAF-XE167F-96F80L AC Datasheet - Page 96

• Manufacturer Part Number: SAF-XE167F-96F80L AC
• Description: IC MCU 16BIT FLASH 144-LQFP
• Manufacturer: Infineon Technologies
• Series: XE16xr

Specifications of SAF-XE167F-96F80L AC

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
• Peripherals: I²S, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 82K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 64 KB
• Interface Type: CAN
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 11
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000450816

4.6.2
The internal operation of the XE167 is controlled by the internal system clock
Because the system clock signal
external sources using different mechanisms, the duration of the system clock periods
(TCSs) and their variation (as well as the derived external timing) depend on the
mechanism used to generate
for the XE167.
Figure 18
Note: The example of PLL operation shown in
The specification of the external timing (AC Characteristics) depends on the period of the
system clock (TCS).
Data Sheet
example of prescaler operation uses a divider factor of 2:1.
Phase Locked Loop Operation (1:N)
f
f
Direct Clock Drive (1:1)
f
f
Prescaler Operation (N:1)
f
f
IN
SYS
IN
SYS
IN
SYS
Definition of Internal Timing
Generation Mechanisms for the System Clock
f
SYS
. This must be considered when calculating the timing
f
SYS
can be generated from a number of internal and
94
Figure 18
XE166 Family Derivatives
uses a PLL factor of 1:4; the
M C_XC2X_CLOCKGEN
TCS
Electrical Parameters
TCS
TCS
V2.1, 2008-08
f
XE167x
SYS
.