SAK-TC1796-256F150E BE Infineon Technologies, SAK-TC1796-256F150E BE Datasheet - Page 129

• Manufacturer Part Number: SAK-TC1796-256F150E BE
• Description: IC MCU 32BIT FLASH 416-BGA
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BE

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: ASC, JTAG, MLI, MSC, SSC
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 260
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (12 bit, 16 Channel) / 10 bit, 4 Channel
• Packages: P-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000438972

4.3.12.3 Synchronous Serial Channel (SSC) Master Mode Timing
Table 34
Parameter
SCLK clock period
MTSR/SLSOx delay from
SCLK rising edge
MRST setup to SCLK
falling edge
MRST hold from SCLK
falling edge
1) SCLK signal rise/fall times are the same as the A2 Pads rise/fall times.
2) SCLK signal high and low times can be minimum 1 ×
3)
Figure 44
Data Sheet
T
SSCmin
=
T
SYS
SCLK
MTSR
MRST
SLSOx
SSC Master Mode Timing (Operating Conditions apply), C
= 1/
SSC Master Mode Timing
f
1)2)
SYS
1)
1)
2)
1)2)
1) This timing is based on the following setup: CON.PH = CON.PO = 0.
2) The transition at SLSOx is based on the following setup: SSOTC.TRAIL = 0
. When
and the first SCLK high pulse is in the first one of a transmission.
f
SYS
t
t
51
51
= 75 MHz,
Symbol
t
t
t
t
50
51
52
53
CC 2 ×
CC 0
SR 10
SR 5
t
52
t
Data
valid
50
t
50
Min.
= 26,67ns
t
53
129
T
T
SSC
SSC
.
3)
Values
Typ.
–
–
–
–
t
51
Max.
–
8
–
–
Electrical Parameters
SSC_Tmg_1.vsd
Unit
ns
ns
ns
ns
L
V1.0, 2008-04
= 50 pF
Note /
Test Con
dition
–
–
–
–
TC1796