PIC17C756-16/L Microchip Technology, PIC17C756-16/L Datasheet - Page 203
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C756-16/L
Manufacturer Part Number
PIC17C756-16/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-16/L
Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 203 of 304
- Download datasheet (6Mb)
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
2000 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
Carry bit =
REG
WREG
Carry bit =
REG
WREG
Q1
=
=
=
=
register ’f’
ADD WREG and Carry bit to f
[ label ] ADDWFC
0
d
(WREG) + (f) + C
OV, C, DC, Z
Add WREG, the Carry Flag and data
memory location ’f’. If ’d’ is 0, the result is
placed in WREG. If ’d’ is 1, the result is
placed in data memory location ’f’.
1
1
ADDWFC
Read
Q2
0001
1
0x02
0x4D
0
0x02
0x50
f
[0,1]
255
000d
REG
Process
Data
Q3
0
ffff
(dest)
f,d
destination
Write to
Q4
ffff
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
WREG
WREG
Q1
=
=
Read literal
And Literal with WREG
[ label ] ANDLW
0
(WREG) .AND. (k)
Z
The contents of WREG are AND’ed with
the 8-bit literal 'k'. The result is placed in
WREG.
1
1
ANDLW
1011
Q2
'k'
0xA3
0x03
k
PIC17C7XX
255
0101
0x5F
Process
Data
Q3
DS30289B-page 203
k
kkkk
(WREG)
Write to
WREG
Q4
kkkk
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