PIC17C756-16/L Microchip Technology, PIC17C756-16/L Datasheet - Page 211
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C756-16/L
Manufacturer Part Number
PIC17C756-16/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-16/L
Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 211 of 304
- Download datasheet (6Mb)
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
2000 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
CNT
Z
CNT
Z
Q1
=
=
=
=
register ’f’
Decrement f
[ label ] DECF f,d
0
d
(f) – 1
OV, C, DC, Z
Decrement register ’f’. If ’d’ is 0, the
result is stored in WREG. If ’d’ is 1, the
result is stored back in register ’f’.
1
1
DECF
Read
0000
Q2
0x01
0
0x00
1
f
[0,1]
255
(dest)
CNT,
011d
Process
Data
Q3
1
ffff
destination
Write to
Q4
ffff
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
Example:
Before Instruction
After Instruction
operation
Decode
Q1
PC
CNT
If CNT
If CNT
Q1
No
PC =
PC =
=
=
=
register ’f’
operation
Decrement f, skip if 0
[ label ] DECFSZ f,d
0
d
(f) – 1
skip if result = 0
None
The contents of register ’f’ are decre-
mented. If ’d’ is 0, the result is placed in
WREG. If ’d’ is 1, the result is placed
back in register ’f’.
If the result is 0, the next instruction,
which is already fetched is discarded
and a NOP is executed instead, making
it a two-cycle instruction.
1
1(2)
HERE
NZERO
ZERO
Read
0001
Q2
Q2
No
Address (HERE)
CNT - 1
0;
Address (HERE)
0;
Address (NZERO)
f
[0,1]
PIC17C7XX
255
(dest);
011d
DECFSZ
GOTO
operation
Process
Data
Q3
Q3
No
DS30289B-page 211
ffff
CNT, 1
HERE
destination
operation
Write to
Q4
Q4
No
ffff
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