AT90S8515A-8JI Atmel, AT90S8515A-8JI Datasheet - Page 73
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AT90S8515A-8JI
Manufacturer Part Number
AT90S8515A-8JI
Description
IC MCU 8K FLSH 8MHZ IT 44PLCC
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheets
1.AT90S8515-4AC.pdf
(112 pages)
2.AT90S8515-4AC.pdf
(4 pages)
3.AT90S8515-4AC.pdf
(4 pages)
Specifications of AT90S8515A-8JI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Port D Data Register – PORTD
Port D Data Direction Register
– DDRD
Port D Input Pins Address –
PIND
Port D as General Digital I/O
Alternate Functions of Port D
0841G–09/01
The Port D Input Pins address (PIND) is not a register; this address enables access to
the physical value on each Port D pin. When reading PORTD, the Port D Data Latch is
read and when reading PIND, the logical values present on the pins are read.
PDn, general I/O pin: The DDDn bit in the DDRD register selects the direction of this pin.
If DDDn is set (one), PDn is configured as an output pin. If DDDn is cleared (zero), PDn
is configured as an input pin. If PDn is set (one) when configured as an input pin, the
MOS pull-up resistor is activated. To switch the pull-up resistor off the PDn has to be
cleared (zero) or the pin has to be configured as an output pin. The Port D pins are tri-
stated when a reset condition becomes active, even if the clock is not active.
Table 24. DDDn Bits on Port D Pins
Note:
• RD – Port D, Bit 7
RD is the external data memory read control strobe. See “Interface to External SRAM”
on page 60 for detailed information.
• WR – Port D, Bit 6
WR is the external data memory write control strobe. See “Interface to External SRAM”
on page 60 for detailed information.
• OC1A – Port D, Bit 5
OC1A: Output compare match output. The PD5 pin can serve as an external output
when the Timer/Counter1 compare matches. The PD5 pin has to be configured as an
output (DDD5 set [one]) to serve this function. See the Timer/Counter1 description for
further details and how to enable the output. The OC1A pin is also the output pin for the
PWM mode timer function.
Bit
$12 ($32)
Read/Write
Initial Value
Bit
$11 ($31)
Read/Write
Initial Value
Bit
$10 ($30)
Read/Write
Initial Value
DDDn
0
0
1
1
n: 7,6…0, pin number.
PORTDn
PORTD7
PIND7
DDD7
R/W
R/W
N/A
R
7
0
7
0
7
0
1
0
1
PORTD6
PIND6
DDD6
R/W
R/W
N/A
R
6
0
6
0
6
Output
Output
Input
Input
I/O
PORTD5
PIND5
DDD5
R/W
R/W
N/A
R
5
0
5
0
5
Pull-up
Yes
No
No
No
PORTD4
PIND4
DDD4
R/W
R/W
N/A
R
4
0
4
0
4
Comment
Tri-state (high-Z)
PDn will source current if ext. pulled low.
Push-pull Zero Output
Push-pull One Output
PORTD3
PIND3
DDD3
R/W
R/W
N/A
R
0
0
3
3
3
PORTD2
PIND2
DDD2
R/W
R/W
N/A
R
2
0
2
0
2
PORTD1
PIND1
DDD1
R/W
R/W
N/A
R
AT90S8515
1
0
1
0
1
PORTD0
PIND0
DDD0
R/W
R/W
N/A
R
0
0
0
0
0
PORTD
DDRD
PIND
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