AT90LS4433-4AI Atmel, AT90LS4433-4AI Datasheet - Page 7
![IC MCU 4K 4MHZ A/D LV 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
AT90LS4433-4AI
Manufacturer Part Number
AT90LS4433-4AI
Description
IC MCU 4K 4MHZ A/D LV 32TQFP
Manufacturer
Atmel
Series
AVR® 90LSr
Datasheet
1.AT90S4433-8AC.pdf
(126 pages)
Specifications of AT90LS4433-4AI
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90LS4433-4AI
Manufacturer:
HYNIX
Quantity:
14
Part Number:
AT90LS4433-4AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Architectural
Overview
1042H–AVR–04/03
The fast-access Register File concept contains 32 x 8-bit general purpose working reg-
isters with a single clock cycle access time. This means that during one single clock
cycle, one Arithmetic Logic Unit (ALU) operation is executed. Two operands are output
from the Register File, the operation is executed, and the result is stored back in the
Register File – in one clock cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers for
Data Space addressing, enabling efficient address calculations. One of the three
address pointers is also used as the address pointer for the constant table look-up func-
tion. These added function registers are the 16-bit X-, Y-, and Z-register.
The ALU supports arithmetic and logic functions between registers or between a con-
stant and a register. Single register operations are also executed in the ALU. Figure 5
shows the AT90S4433 AVR RISC microcontroller architecture.
In addition to the register operation, the conventional Memory Addressing modes can be
used on the Register File as well. This is enabled by the fact that the Register File is
assigned the 32 lowermost Data Space addresses ($00 - $1F), allowing them to be
accessed as though they were ordinary memory locations.
Figure 5. The AT90S4433 AVR RISC Architecture
Control Lines
Instruction
Instruction
Program
2K X 16
Register
Decoder
Memory
Program
Data Bus 8-bit
Counter
and Control
Registrers
EEPROM
I/O Lines
Purpose
General
128 x 8
256 x 8
SRAM
Status
32 x 8
Data
ALU
20
AT90S/LS4433
Analog to Digital
Timer/Counter
Timer/Counter
Comparator
with PWM
Watchdog
Converter
Interrupt
Analog
UART
Serial
16-bit
Timer
8-bit
Unit
Unit
SPI
7