ATMEGA32L-8MI Atmel, ATMEGA32L-8MI Datasheet - Page 41
![IC AVR MCU 32K LV 8MHZ IND 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA32L-8MI
Manufacturer Part Number
ATMEGA32L-8MI
Description
IC AVR MCU 32K LV 8MHZ IND 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32L-8MI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Internal Voltage
Reference
Voltage Reference
Enable Signals and
Start-up Time
Watchdog Timer
2503Q–AVR–02/11
ATmega32 features an internal bandgap reference. This reference is used for Brown-out Detec-
tion, and it can be used as an input to the Analog Comparator or the ADC. The 2.56V reference
to the ADC is generated from the internal bandgap reference.
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
erence is on during the following situations:
1. When the BOD is enabled (by programming the BODEN Fuse).
2. When the bandgap reference is connected to the Analog Comparator (by setting the
3. When the ADC is enabled.
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
Table 16. Internal Voltage Reference Characteristics
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at 1MHz. This is
the typical value at V
controlling the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as
shown in
Timer. The Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs.
Eight different clock cycle periods can be selected to determine the reset period. If the reset
period expires without another Watchdog Reset, the ATmega32 resets and executes from the
Reset Vector. For timing details on the Watchdog Reset, refer to
To prevent unintentional disabling of the Watchdog, a special turn-off sequence must be fol-
lowed when the Watchdog is disabled. Refer to the description of the Watchdog Timer Control
Register for details.
Figure 21. Watchdog Timer
Symbol
V
ACBG bit in ACSR).
t
I
BG
BG
BG
Table 17 on page
Parameter
Bandgap reference voltage
Bandgap reference start-up time
Bandgap reference current consumption
CC
Table
= 5V. See characterization data for typical values at other V
42. The WDR – Watchdog Reset – instruction resets the Watchdog
OSCILLATOR
WATCHDOG
16. To save power, the reference is not always turned on. The ref-
1.15
Min
page
1.23
Typ
40
10
ATmega32(L)
40.
Max
1.35
70
Units
µA
µs
V
CC
levels. By
41
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