ATMEGA32L-8MI Atmel, ATMEGA32L-8MI Datasheet - Page 57
![IC AVR MCU 32K LV 8MHZ IND 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA32L-8MI
Manufacturer Part Number
ATMEGA32L-8MI
Description
IC AVR MCU 32K LV 8MHZ IND 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32L-8MI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Alternate Functions of
Port B
2503Q–AVR–02/11
Table 24. Overriding Signals for Alternate Functions in PA3..PA0
The Port B pins with alternate functions are shown in
Table 25. Port B Pins Alternate Functions
The alternate pin configuration is as follows:
• SCK – Port B, Bit 7
SCK: Master Clock output, Slave Clock input pin for SPI. When the SPI is enabled as a Slave,
this pin is configured as an input regardless of the setting of DDB7. When the SPI is enabled as
a Master, the data direction of this pin is controlled by DDB7. When the pin is forced by the SPI
to be an input, the pull-up can still be controlled by the PORTB7 bit.
• MISO – Port B, Bit 6
MISO: Master Data input, Slave Data output pin for SPI. When the SPI is enabled as a Master,
this pin is configured as an input regardless of the setting of DDB6. When the SPI is enabled as
a Slave, the data direction of this pin is controlled by DDB6. When the pin is forced by the SPI to
be an input, the pull-up can still be controlled by the PORTB6 bit.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Alternate Functions
SCK (SPI Bus Serial Clock)
MISO (SPI Bus Master Input/Slave Output)
MOSI (SPI Bus Master Output/Slave Input)
SS (SPI Slave Select Input)
AIN1 (Analog Comparator Negative Input)
OC0 (Timer/Counter0 Output Compare Match Output)
AIN0 (Analog Comparator Positive Input)
INT2 (External Interrupt 2 Input)
T1 (Timer/Counter1 External Counter Input)
T0 (Timer/Counter0 External Counter Input)
XCK (USART External Clock Input/Output)
PA3/ADC3
ADC3 INPUT
0
0
0
0
0
0
0
0
–
PA2/ADC2
ADC2 INPUT
0
0
0
0
0
0
0
0
–
Table
PA1/ADC1
ADC1 INPUT
25.
0
0
0
0
0
0
0
0
–
ATmega32(L)
PA0/ADC0
ADC0 INPUT
0
0
0
0
0
0
0
0
–
57
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