AT91FR40162-CI Atmel, AT91FR40162-CI Datasheet



Manufacturer Part Number

Specifications of AT91FR40162-CI

Core Processor
Core Size
Number Of I /o
Program Memory Size
2MB (1M x 16)
Program Memory Type
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Operating Temperature
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
Data Converters

Available stocks

Part Number
Part Number:
Part Number:
10 000
Part Number:
AT91FR40162-CI SL383
10 000
1. Description
The AT91FR40162 is a member of the Atmel AT91 16/32-bit Microcontroller family,
which is based on the ARM7TDMI processor core. The processor has a high-perfor-
mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low
power consumption.
The AT91FR40162 ARM microcontroller features 2 Mbits of on-chip SRAM and 2
Mbytes of Flash memory in a single compact 121-ball BGA package. Its high level of
integration and very small footprint make the device ideal for space-constrained appli-
cations. The high-speed on-chip SRAM enables a performance of up to 74 MIPs in
typical conditions with significant power reduction and EMC improvement over an
external SRAM implementation.
The Flash memory may be programmed via the JTAG/ICE interface or the factory-
programmed Flash Uploader using a single device supply, making the AT91FR40162
suitable for in-system programmable applications.
Incorporates the ARM7TDMI
256K Bytes of On-chip SRAM
1024K Words 16-bit Flash Memory (2M bytes)
Fully Programmable External Bus Interface (EBI)
8-level Priority, Individually Maskable, Vectored Interrupt Controller
32 Programmable I/O Lines
3-channel 16-bit Timer/Counter
Programmable Watchdog Timer
Advanced Power-saving Features
Fully Static Operation:
2.7V to 3.6V I/O Operating Range, 1.65V to 1.95V Core Operating Range
-40 C to 85 C Temperature Range
Available in a 121-ball 10 x 10 x 1.2 mm BGA Package with 0.8 mm Ball Pitch
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-circuit Emulation)
– 32-bit Data Bus, Single-clock Cycle Access
– Single Voltage Read/Write,
– Sector Erase Architecture
– Dual-plane Organization Allows Concurrent Read and Program/Erase
– Erase Suspend Capability
– Low-power Operation
– Data Polling, Toggle Bit and Ready/Busy End of Program Cycle Detection
– Reset Input for Device Initialization
– Sector Program Unlock Command
– 128-bit Protection Register
– Factory-programmed AT91 Flash Uploader Software
– Up to 8 Chip Selects, Maximum External Address Space of 64M Bytes
– Software Programmable 8/16-bit External Data Bus
– 4 External Interrupts, Including a High-priority Low-latency Interrupt Request
– 3 External Clock Inputs, 2 Multi-purpose I/O Pins per Channel
– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART
– CPU and Peripherals Can be De-activated Individually
– 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85 C
Processor Core

AT91FR40162-CI Summary of contents

Page 1

... Available in a 121-ball 1.2 mm BGA Package with 0.8 mm Ball Pitch 1. Description The AT91FR40162 is a member of the Atmel AT91 16/32-bit Microcontroller family, which is based on the ARM7TDMI processor core. The processor has a high-perfor- mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low power consumption ...

Page 2

... Pin Configuration Figure 2-1. AT91FR40162 Pinout for 121-ball BGA Package (Top View) A1 Corner 1 2 P21/TXD1 P19 NTRI P22 P20 RXD1 SCK1 VDDIO GND P23 MCKI P24 P25 BMS MCK0 GND TMS NWE TDO NWR0 P26 VDDCORE VDDIO NCS2 NWAIT GND NLB ...

Page 3

... Pin Description Table 3-1. AT91FR40162 Pin Description Module Name Function A0 - A23 Address Bus D0 - D15 Data Bus NCS0 - NCS3 External Chip Select CS4 - CS7 External Chip Select NWR0 Lower Byte 0 Write Signal NWR1 Upper Byte 1 Write Signal NRD Read Signal EBI NWE ...

Page 4

... Power VDDCORE Power GND Ground Power (1) VPP Faster Program/Erase Voltage Note compatible with AT91FR40162S recommended to connect VPP to VDDIO. Please refer to the application note: How to Upgrade an AT91FR40162-based system to an AT91FR40162S-based System. AT91FR40162 4 Active Type Level Comments Input Low Enables Flash Memory when pulled low ...

Page 5

... Block Diagram Figure 4-1. AT91FR40162 2632D–ATARM–15-Sep-05 Interface Bus External EBI: AT91FR40162 5 ...

Page 6

... Memories The AT91FR40162 embeds 256K bytes of internal SRAM. The internal memory is directly connected to the 32-bit data bus and is single-cycle accessible. This provides maximum per- formance of 67 MIPS at 75 MHz by using the ARM instruction set of the processor, minimizing system power consumption and improving on the performance of separate memory solutions ...

Page 7

... The 3-channel, 16-bit Timer Counter (TC) is highly programmable and supports capture or waveform modes. Each TC channel can be programmed to measure or generate different kinds of waves, and can detect and control two input/output signals. The TC has also 3 exter- nal clock signals. 2632D–ATARM–15-Sep-05 AT91FR40162 7 ...

Page 8

... Detailed description of Flash memory AT91FR40162 8 Document Title ARM7TDMI (Thumb) Datasheet AT91x40 Series Datasheet MCU AT91R40008 Electrical Characteristics Datasheet Flash AT49BV/LV1604A/1614A(T) 2-Mbyte (1M x 16/ Memory volt Only Flash Memory Datasheet AT91FR40162 Datasheet (this document) AT49BV/LV1604A/1614A(T) 2-Mbyte (1M x 16/ volt Only Flash Memory Datasheet 2632D–ATARM–15-Sep-05 ...

Page 9

... Input/Output Considerations The AT91FR40162 I/O pads accept voltage levels up to the VDDIO power supply limit. After the reset, the microcontroller peripheral I/Os are initialized as inputs to provide the user with maximum flexibility recommended that in any application phase, the inputs to the micro- controller be held at valid logic levels to minimize the power consumption ...

Page 10

... In any of these address spaces, the ARM7TDMI operates in little-endian mode only. 7.6.1 Internal Memories The AT91FR40162 microcontroller integrates 256K bytes of internal SRAM bits wide and single-clock cycle accessible. Byte (8-bit), half-word (16-bit) and word (32-bit) accesses are supported and are executed within one cycle. Fetching either Thumb or ARM instructions is supported, and internal memory can store two times as many Thumb instructions as ARM instructions ...

Page 11

... The ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Interrupt, Fast Interrupt) are mapped from address 0x0 to address 0x20. In order to allow these vectors to be redefined dynamically by the software, the AT91FR40162 uses a remap command that enables switching between the boot memory and the internal primary SRAM bank addresses. ...

Page 12

... The External Bus Interface features also the Early Read Protocol, configurable for all the devices, that significantly reduces access time requirements on an external device in the case of single-clock cycle access. In the AT91FR40162, the External Bus Interface connects internally to the Flash memory. 7.6.6 Flash Memory The 2-Mbyte Flash memory is organized as 1, 048, 576 words of 16 bits each ...

Page 13

... Flash Uploader Operations The Flash Uploader requires the encapsulated Flash to be used as the AT91FR40162 boot memory and a valid clock to be applied to MCKI. After reset, the Flash Uploader immediately recopies itself into the internal SRAM and jumps to it. The following operation requires this 2632D– ...

Page 14

... Note that in the event that the Flash Uploader is erased from the first sector while the new final application is not yet programmed, and while the target system power supply is switched off, it leads to a non-recoverable error and the AT91FR40162 cannot be re-programmed by using the Flash Uploader. ...

Page 15

... Peripheral Data Controller The AT91FR40162 has a 4-channel PDC dedicated to the two on-chip USARTs. One PDC channel is dedicated to the receiver and one to the transmitter of each USART. The user interface of a PDC channel is integrated in the memory space of each USART. It contains a 32-bit Address Pointer Register (RPR or TPR) and a 16-bit Transfer Counter Reg- ister (RCR or TCR) ...

Page 16

... TC: Timer Counter The AT91FR40162 features a Timer Counter block that includes three identical 16-bit timer counter channels. Each channel can be independently programmed to perform a wide range of functions including frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. ...

Page 17

... Ordering Information Table 8-1. Ordering Information Ordering Code AT91FR40162-CI 2632D–ATARM–15-Sep-05 Package BGA 121 AT91FR40162 Temperature Operating Range Industrial (- ...

Page 18

... Packaging Information Figure 9-1. AT91FR40162 Package Table 9-1. Thermal Resistance Data Symbol Parameter Junction-to-ambient thermal resistance JA Junction-to-case thermal resistance JC Table 9-2. Device and 121-ball BGA Package Maximum Weight 194 Table 9-3. 121-ball BGA Package Characteristics Ball diameter Ball land Solder mask opening ...

Page 19

... By default, the package level 1 is qualified at 220 C (unless 235 C is stipulated). 3. The body temperature is the most important parameter but other profile parameters such as total exposure time to hot temperature or heating rate may also influence component reliability. AT91FR40162 Convection or IR/Convection VPR 3 C/sec. max. ...

Page 20

... This Errata described below refers to: • The following datasheet: • 121-lead BGA devices with the following references in the marking: AT91FR40162-CI 58A03X 1. Full Chip Erase Command May Not Fully Erase Flash When using the Full Chip Erase Command to erase the Flash, the Flash may not be fully erased ...

Page 21

... VPP must not be set to a voltage higher than 3.3V and must be lower or equal to VDDIO. Note: 2632D–ATARM–15-Sep- compatible with AT91FR40162S recommended to connect VPP to VDDIO Please refer to the application note: How to Upgrade an AT91FR40162-based system to an AT91FR40162S-based System. Atmel literature number 6186. ...

Page 22

... Table 7 added, 121-ball BGA Package Characteristics Version D Revisions since last issue Global Section-title numbers introduced in change of template and figure and table numbering prop- erties updated as well. Page: 4 Table 3-1, “AT91FR40162 Pin Description,” on page in note Page: 20-21 Section 11. ”Errata” on page AT91FR40162 22 (1) to Pin Description with link to Application note ...

Page 23

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Page 24

... The file is a secure document that has been embedded in this document. Double click the pushpin to view. 15/09/2005 15:22:54 Embedded Secure Document ...

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