T89C51CC02CA-TISIM Atmel, T89C51CC02CA-TISIM Datasheet - Page 36
![IC 8051 MCU FLASH 16K 28SOIC](/photos/6/82/68295/453-28-soic_sml.jpg)
T89C51CC02CA-TISIM
Manufacturer Part Number
T89C51CC02CA-TISIM
Description
IC 8051 MCU FLASH 16K 28SOIC
Manufacturer
Atmel
Series
AT89C CANr
Datasheets
1.T89C51CC02CA-TDSIM.pdf
(159 pages)
2.T89C51CC02CA-TDSIM.pdf
(33 pages)
3.T89C51CC02CA-TDSIM.pdf
(29 pages)
4.T89C51CC02CA-TDSIM.pdf
(148 pages)
Specifications of T89C51CC02CA-TISIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
20
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
For Use With
AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C51CC02CATISIM
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Status of the Flash Memory
Selecting FM1
Loading the Column Latches
36
T89C51CC02
The bit FBUSY in FCON register is used to indicate the status of programming.
FBUSY is set when programming is in progress.
The bit ENBOOT in AUXR1 register is used to map FM1 from F800h to FFFFh.
Any number of data from 1 byte to 128 Bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of Bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 14:
•
•
•
•
•
•
Save then disable interrupt and map the column latch space by setting FPS bit.
Load the DPTR with the address to load.
Load Accumulator register with the data to load.
Execute the MOVX @DPTR, A instruction.
If needed loop the three last instructions until the page is completely loaded.
unmap the column latch and Restore Interrupt
4126F–CAN–12/03
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