TS87C51RB2-LIA Atmel, TS87C51RB2-LIA Datasheet - Page 24

• Manufacturer Part Number: TS87C51RB2-LIA
• Description: IC MCU 8BIT 16K OTP 30MHZ 40-DIP
• Manufacturer: Atmel
• Series: 87Cr

Specifications of TS87C51RB2-LIA

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 30/20MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
The CMOD SFR includes three additional bits associated with the PCA (
24
The CIDL bit which allows the PCA to stop during idle mode.
The WDTE bit which enables or disables the watchdog function on module 4.
Idle
Fosc /12
T0 OVF
Fosc / 4
P1.2
Address 0D9H
a.
b. f
CIDL
WDTE
-
CPS1
CPS0
ECF
CMOD
Symbol
User software should not write 1s to reserved bits. These bits may be used in future 8051 family
products to invoke new features. In that case, the reset or inactive value of the new bit will be 0, and its
active value will be 1. The value read from a reserved bit is indeterminate.
osc
= oscillator frequency
CIDL
Table 8. CMOD: PCA Counter Mode Register
CF
Reset value
Function
Counter Idle control: CIDL = 0 programs the PCA Counter to continue functioning during
idle Mode. CIDL = 1 programs it to be gated off during idle.
Watchdog Timer Enable: WDTE = 0 disables Watchdog Timer function on PCA Module 4.
WDTE = 1 enables it.
Not implemented, reserved for future use.
PCA Count Pulse Select bit 1.
PCA Count Pulse Select bit 0.
PCA Enable Counter Overflow interrupt: ECF = 1 enables CF bit in CCON to generate an
interrupt. ECF = 0 disables that function of CF.
WDTE
CPS1
CR
0
0
1
1
Figure 7. PCA Timer/Counter
CPS0 Selected PCA input.
0
1
0
1
CIDL WDTE
0
Internal clock f
Internal clock f
Timer 0 Overflow
External clock at ECI/P1.2 pin (max rate = f
CCF4 CCF3
0
CPS1
osc
osc
CCF2
/12 ( Or f
/4 ( Or f
X
-
16 bit up/down counter
CH
b
CPS0
CCF1
a
osc
osc
X
/2 in X2 Mode).
-
/6 in X2 Mode).
ECF
CCF0
See Figure 7 and Table 8).
CL
X
CMOD
0xD9
CCON
0xD8
-
osc
overflow
CPS1
/ 8)
Rev. C - 06 March, 2001
0
To PCA
modules
CPS0
0
It
ECF
0