AT80C51SND1C-ROTUL Atmel, AT80C51SND1C-ROTUL Datasheet - Page 20
AT80C51SND1C-ROTUL
Manufacturer Part Number
AT80C51SND1C-ROTUL
Description
IC MCU FLASH MP3 DECODER 80-TQFP
Manufacturer
Atmel
Series
80Cr
Datasheet
1.AT80C51SND1C-ROTIL.pdf
(213 pages)
Specifications of AT80C51SND1C-ROTUL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Type
ROMless
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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6.1.3
6.2
6.2.1
6.3
20
ROM Memory Architecture
Flash Memory Architecture
AT8xC51SND1C
External Bus Cycles
User Space
This section describes the bus cycles the AT80C51SND1C executes to fetch code (see
Figure 6-4) in the external program/code memory.
External memory cycle takes 6 CPU clock periods. This is equivalent to 12 oscillator clock peri-
ods in standard mode or 6 oscillator clock periods in X2 mode. For further information on X2
mode see section “Clock “.
For simplicity, the accompanying figure depicts the bus cycle waveforms in idealized form and
does not provide precise timing information.
For bus cycling parameters refer to the ‘AC-DC parameters’ section.
Figure 6-4.
As shown in Figure 6-5 the AT83SND1C ROM memory is composed of one space detailed in
the following paragraph.
Figure 6-5.
This space is composed of a 64K Bytes ROM memory programmed during the manufacturing
process. It contains the user’s application code.
As shown in
in the following paragraphs.
CPU Clock
PSEN
ALE
Figure 6-6
P0
P2
External Code Fetch Waveforms
AT83SND1C Memory Architecture
D7:0
PCH
the AT89C51SND1C Flash memory is composed of four spaces detailed
PCL
FFFFh
0000h
ROM Memory
PCH
64K Bytes
D7:0
User
PCL
PCH
D7:0
4109L–8051–02/08
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