LPC2106FHN48,551 NXP Semiconductors, LPC2106FHN48,551 Datasheet - Page 13

IC ARM7 MCU FLASH 128K 48-HVQFN

LPC2106FHN48,551

Manufacturer Part Number
LPC2106FHN48,551
Description
IC ARM7 MCU FLASH 128K 48-HVQFN
Manufacturer
NXP Semiconductors
Series
LPC2100r
Datasheet

Specifications of LPC2106FHN48,551

Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
For Use With
622-1019 - BOARD FOR LPC2106 48-LQFP622-1008 - BOARD FOR LPC9103 10-HVSON568-1756 - BOARD EVAL FOR LPC210X ARM MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
568-1324
935274661551
LPC2106FHN48-S
NXP Semiconductors
LPC2104_2105_2106_7
Product data sheet
6.6 Pin connect block
6.7 Pin function select register 0 (PINSEL0 - 0xE002 C000)
Table 4.
[1]
The pin connect block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on chip peripherals. Peripherals should be connected to the appropriate pins
prior to being activated, and prior to any related interrupt(s) being enabled. Activity of any
enabled peripheral function that is not mapped to a related pin should be considered
undefined.
The Pin Control Module contains two registers as shown in
Table 5.
The PINSEL0 register controls the functions of the pins as per the settings listed in
Table
function is selected for a pin. For other functions, direction is controlled automatically.
Settings other than those shown in
Block
UART 1
PWM0
I
SPI and SSP
-
PLL
RTC
System Control
System Control
System Control
Address
0xE002 C000
0xE002 C004
2
C-bus
Available on LPC2104/2105/2106/01 only.
6. The direction control bit in the IODIR register is effective only when the GPIO
Interrupt sources
Pin control module registers
[1]
Flag(s)
Rx Line Status (RLS)
Transmit Holding Register empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
Modem Status Interrupt (MSI)
Auto-Baud Time-Out (ABTO)
End of Auto-Baud (ABEO)
Match 0 to 6 (MR0, MR1, MR2, MR3, MR4, MR5, MR6)
SI (state change)
SPIF, MODF (SPI)
TXRIS, RXRIS, RTRIS, RORRIS (SSP)
reserved
PLL Lock (PLOCK)
RTCCIF (Counter Increment), RTCALF (Alarm)
External Interrupt 0 (EINT0)
External Interrupt 1 (EINT1)
External Interrupt 2 (EINT2)
Name
PINSEL0
PINSEL1
Rev. 07 — 20 June 2008
…continued
Table 6
Description
Pin function select register 0
Pin function select register 1
[1]
[1]
are reserved, and should not be used
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
[1]
Table
5.
© NXP B.V. 2008. All rights reserved.
Access
Read/Write
Read/Write
VIC channel #
7
8
9
10
11
12
13
14
15
16
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