P89CV51RC2FBC,557 NXP Semiconductors, P89CV51RC2FBC,557 Datasheet - Page 32

• Manufacturer Part Number: P89CV51RC2FBC,557
• Description: IC 80C51 MCU FLASH 64K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Cr

Specifications of P89CV51RC2FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89CV5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4255; 935284104557; P89CV51RC2FBC

NXP Semiconductors
P89CV51RB2_RC2_RD2_3
Product data sheet
Fig 11. Timer 2 in Capture mode
Fig 12. Timer 2 in Auto-reload mode (DCEN = 0)
OSC
T2 pin
OSC
T2 pin
6.5.2 Auto-reload mode (up or down counter)
T2EX pin
T2EX pin
There is no reload value for TL2 and TH2 in this mode. Even when a capture event occurs
from T2EX, the counter keeps on counting T2 pin transitions or f
loaded contents of RCAP2L and RCAP2H registers are not protected, once Timer 2
interrupt is signalled it has to be serviced before a new capture event on T2EX pin occurs.
Otherwise, the next falling edge on T2EX pin will initiate reload of the current value from
TL2 and TH2 to RCAP2L and RCAP2H and consequently corrupt their content related to
the previously reported interrupt.
In the 16-bit auto-reload mode, Timer 2 can be configured as either a timer or counter (via
C/T2 in T2CON), then programmed to count up or down. The counting direction is
determined by bit DCEN (Down Counter Enable) which is located in the T2MOD register
(see
counting up. If the DCEN bit is set, Timer 2 can count up or down depending on the value
of the T2EX pin.
Figure 12
6
6
transition
transition
detector
detector
Table 21
C/T2 = 0
C/T2 = 1
C/T2 = 0
C/T2 = 1
shows Timer 2 counting up automatically (DCEN = 0).
and
EXEN2
EXEN2
Table
control
control
TR2
Rev. 03 — 25 August 2009
TR2
22). When reset is applied, DCEN = 0 and Timer 2 will default to
control
control
capture
reload
RCAP2L RCAP2H
RCAP2L RCAP2H
(8-bits)
(8-bits)
TL2
TL2
P89CV51RB2/RC2/RD2
(8-bits)
(8-bits)
TH2
TH2
EXF2
EXF2
TF2
TF2
80C51 with 1 kB RAM, SPI
osc
/ 6 pulses. Since once
© NXP B.V. 2009. All rights reserved.
002aaa524
002aaa523
interrupt
interrupt
timer 2
timer 2
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