SX18AC/SO Parallax Inc, SX18AC/SO Datasheet - Page 12

• Manufacturer Part Number: SX18AC/SO
• Description: IC MCU 2K FLASH 50MHZ SO-18
• Manufacturer: Parallax Inc
• Series: SXr

Specifications of SX18AC/SO

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 50MHz
• Number Of I /o: 12
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 137 x 8
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -

SX18AC / SX20AC / SX28AC
5.0 DEVICE CONFIGURATION REGISTERS
The SX device has three registers (FUSE, FUSEX,
DEVICE) that control functions such as operating the
device in Turbo mode, extended (8-level deep) stack
operation, and speed selection for the internal RC oscilla-
tor. These registers are not programmable “on the fly”
5.1 FUSE Word (Read/Program at FFFh in main memory map)
© 1998 Scenix Semiconductor, Inc. All rights reserved.
TURBO
SYNC
OPTIONX
STACKX
IRC
DIV2: DIV0
CP
WDTE
FOSC1: FOSC0 External oscillator configuration (valid when IRC = 1):
TURBO
Bit 11
SYNC
Turbo mode enable:
0 =
1 =
Synchronous input enable (for turbo mode):
0 =
1 =
OPTION register extension enable:
0 =
1 =
Stack extension enable:
0 =
1 =
0 =
1 =
000b
001b
010b
011b
100b
101b
110b
111b
Code protect enable:
0 =
1 =
Watchdog timer enable:
0 =
1 =
00b =
10b =
01b =
11b =
Internal RC oscillator enable:
Internal RC oscillator divider:
OPTIONX
enabled
disabled
OPTION register increased from six to eight bits for RTW and RTW_IE
OPTION register is six bits (two most significant bits forced to 1)
8 levels (stack extension enabled)
2 levels (stack extension disabled)
enabled - OSC1 weakly pulled low, OSC2 weakly pulled high
disabled - OSC1 and OSC2 behave according to FOSC1: FOSC0
=
=
=
=
=
=
=
=
enabled (FUSE, code, and ID memories read back as garbled data)
disabled (FUSE, code, and ID memories can be read normally)
disabled
enabled
LP – low power crystal
HS – high speed crystal
XT – normal crystal
RC network - OSC2 is weakly pulled high (no CLKOUT output)
turbo (instruction clock = osc/1)
instr clock = osc/4
STACKX
4 MHz
2 MHz
1 MHz
500 KHz
250 KHz
125 KHz
62.5 KHz
31.25 KHz
IRC
- 12 -
DIV2
during normal device operation. Instead, the FUSE and
FUSEX registers can only be accessed when the SX
device is being programmed. The DEVICE register is a
read-only, hard-wired register, programmed during the
manufacturing process.
DIV1
DIV0
CP
WDTE
FOSC1
www.scenix.com
FOSC0
Bit 0