SX18AC/SO Parallax Inc, SX18AC/SO Datasheet - Page 8

• Manufacturer Part Number: SX18AC/SO
• Description: IC MCU 2K FLASH 50MHZ SO-18
• Manufacturer: Parallax Inc
• Series: SXr

Specifications of SX18AC/SO

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 50MHz
• Number Of I /o: 12
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 137 x 8
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -

SX18AC / SX20AC / SX28AC
When two successive read-modify-write instructions are
used on the same I/O port with a very high clock rate, the
“write” part of one instruction might not occur soon
enough before the “read” part of the very next instruction,
resulting in getting “old” data for the second instruction.
To ensure predictable results, avoid using two successive
read-modify-write instructions that access the same port
data register if the clock rate is high.
3.2 Port Configuration
Each port pin offers the following configuration options:
• data direction
• input voltage levels (TTL or CMOS)
• pullup type (pullup resistor or open collector)
• Schmitt trigger input (for Port B and Port C only)
Port B offers the additional option to use the port pins for
the Multi-Input Wakeup/Interrupt function and/or the ana-
log comparator function.
Port configuration is preformed by writing to a set of con-
trol registers associated with the port. A special-purpose
instruction is used to write these control registers:
• mov !RA,W (move W to Port A control register)
• mov !RB,W (move W to Port B control register)
• mov !RC,W (move W to Port C control register)
Each one of these instructions writes a port control regis-
ter for Port A, Port B, or Port C. There are multiple control
registers for each port. To specify which one you want to
access, you use another register called the MODE regis-
ter.
3.2.1 MODE Register
The MODE register controls access to the port configura-
tion registers. Because the MODE register is not mem-
ory-mapped, it is accessed by the following special-
purpose instructions:
• mov M, #lit (move literal to MODE register)
• mov M,W (move W to MODE register)
• mov W,M (move MODE register to W)
The value contained in the MODE register determines
which port control register is accessed by the “mov !rx,W”
instruction as indicated in Table 3-3. MODE register val-
ues not listed in the table are reserved for future expan-
sion and should not be used. Therefore, the MODE
register should always contain a value from 08h to 0Fh.
Upon power-up, the MODE register is initialized to 0Fh,
which enables access to the port direction registers.
After a value is written to the MODE register, that setting
remains in effect until it is changed by writing to the
MODE register again. For example, you can write the
value 0Eh to the MODE register just once, and then write
to each of the three pullup configuration registers using
the three “mov !rx,W” instructions.
© 1998 Scenix Semiconductor, Inc. All rights reserved.
- 8 -
The following code example shows how to program the
pullup control registers.
First the MODE register is loaded with 0Eh to select
access to the pullup control registers (PLP_A, PLP_B,
and PLP_C). Then the MOV !rx,W instructions are used
to specify which port pins are to be connected to the
internal pullup resistors. Setting a bit to 1 disconnects the
corresponding pullup resistor, and clearing a bit to 0 con-
nects the corresponding pullup resistor.
3.2.2 Port Configuration Registers
The port configuration registers that you control with the
MOV !rx,W instruction operate as described below.
RA, RB, and RC Data Direction Registers (MODE=0Fh)
Each register bit sets the data direction for one port pin.
Set the bit to 1 to make the pin operate as a high-imped-
ance input. Clear the bit to 0 to make the pin operate as
an output.
PLP_A, PLP_B, and PLP_C: Pullup Enable Registers
(MODE=0Eh)
Each register bit determines whether an internal pullup
resistor is connected to the pin. Set the bit to 1 to discon-
nect the pullup resistor or clear the bit to 0 to connect the
pullup resistor.
MODE Reg. mov !RA,W mov !RB,W
mov
mov
mov
mov
mov
mov
mov
0Ch
0Dh
0Ah
0Bh
0Eh
0Fh
08h
09h
M,#$0E
W,#$03
!RA,W
W,#$FF
!RB,W
W,#$00
!RC,W
Table 3-3. MODE Register and Port
RA Direction RB Direction RC Direction
Control Register Access
not used
not used
not used
not used
not used
PLP_A
LVL_A
;MODE=0Eh to access port pullup
;registers
;W = 0000 0011
;disable pullups for A0 and A1
;W = 1111 1111
;disable all pullups for B0-B7
;W = 0000 0000
;enable all pullups for C0-C7
WKPND_B
WKED_B
WKEN_B
CMP_B
PLP_B
LVL_B
ST_B
www.scenix.com
mov !RC,W
not used
not used
not used
not used
PLP_C
LVL_C
ST_C