SX18AC/SO Parallax Inc, SX18AC/SO Datasheet - Page 7
![no-image](/images/manufacturer_photos/0/5/515/parallax_inc_sml.jpg)
SX18AC/SO
Manufacturer Part Number
SX18AC/SO
Description
IC MCU 2K FLASH 50MHZ SO-18
Manufacturer
Parallax Inc
Series
SXr
Datasheet
1.SX18ACSO.pdf
(43 pages)
Specifications of SX18AC/SO
Core Processor
RISC
Core Size
8-Bit
Speed
50MHz
Number Of I /o
12
Program Memory Size
3KB (2K x 12)
Program Memory Type
FLASH
Ram Size
137 x 8
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC
Voltage - Supply (vcc/vdd)
-
Eeprom Size
-
Data Converters
-
Peripherals
-
Connectivity
-
3.1 Reading and Writing the Ports
The three ports are memory-mapped into the data mem-
ory address space. To the CPU, the three ports are avail-
able as the RA, RB, and RC file registers at data memory
addresses 05h, 06h, and 07h, respectively. Writing to a
port data register sets the voltage levels of the corre-
sponding port pins that have been configured to operate
as outputs. Reading from a register reads the voltage lev-
els of the corresponding port pins that have been config-
ured as inputs.
For example, suppose all four Port A pins are configured
as outputs and with RA0 and RA1 to be high, and RA2
and RA3 to be low:
The second “mov” instruction in this example writes the
Port A data register (RA), which controls the output levels
of the four Port A pins, RA0 through RA3. Because Port
© 1998 Scenix Semiconductor, Inc. All rights reserved.
mov
mov
W,#$03
$05,W
;load W with the value 03h
;(bits 0 and 1 high)
;write 03h to Port A data
;register
RD/WR
RD/WR
WR
WR
WR
PLP_B or PLP_C
0 = Pullup Enable
1 = Pullup Disable
ST_B or ST_C
LV_B or LV_C
0 = Output
1 = Hi-Z Input
RB or RC
RD
0 = Schmitt Trigger Enable
1 = Schmitt Trigger Disable
RB or RC
0 = CMOS
1 = TTL
Direction
Data
Figure 3-2. Port B, Port C Configuration
Port B: Input, MIWU, Comparator
Port C: Input Only
MODE
- 7 -
A has only four I/O pins, only the four least significant bits
of this register are used. The four high-order register bits
are “don’t care” bits. Port B and Port C are both eight bits
wide, so the full widths of the RB and RC registers are
used.
When a write is performed to a bit position for a port that
has been configured as an input, a write to the port data
register still needs to be performed, but it has no immedi-
ate effect on the pin. If later that pin is configured to
operate as an output, it will reflect the value that has
been written to the data register.
When a read is performed from a bit position for a port,
the operation is actually reading the voltage level on the
pin itself, not necessarily the bit value stored in the port
data register. This is true whether the pin is configured to
operate as an input or an output. Therefore, with the pin
configured to operate as an input, the data register con-
tents have no effect on the value that you read. With the
pin configured to operate as an output, what is read gen-
erally matches what has been written to the register.
M
U
X
M
U
X
Schmitt Trigger Buffer
CMOS Buffer
~ ~
TTL Buffer
V
dd
Pullup Resistor
(
SX18AC / SX20AC / SX28AC
~
20k )
Port B or
Port C PIN
www.scenix.com