CY8C25122-24PI Cypress Semiconductor Corp, CY8C25122-24PI Datasheet - Page 90

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CY8C25122-24PI

Manufacturer Part Number
CY8C25122-24PI
Description
IC MCU 4K FLASH 256B 8-DIP
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ CY8C25xxxr
Datasheet

Specifications of CY8C25122-24PI

Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.25 V
Data Converters
A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
CapSense
Technology
CMOS
Processing Unit
Microcontroller
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Package Type
PDIP
Screening Level
Industrial
Pin Count
8
Mounting
Through Hole
Rad Hardened
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1424

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY8C25122-24PI
Quantity:
2 301
Part Number:
CY8C25122-24PI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Table 70:
Analog Switch Cap Type A Block 10 Control 2 Register (ASA10CR2, Address = Bank 0/1, 82h)
Analog Switch Cap Type A Block 12 Control 2 Register (ASA12CR2, Address = Bank 0/1, 8Ah)
Analog Switch Cap Type A Block 21 Control 2 Register (ASA21CR2, Address = Bank 0/1, 96h)
Analog Switch Cap Type A Block 23 Control 2 Register (ASA23CR2, Address = Bank 0/1, 9Eh)
90
Bit 7 : AnalogBus Enable output to the analog bus
0 = Disable output to analog column bus
1 = Enable output to analog column bus
(The output on the analog column bus is affected by the state of the ClockPhase bit in Control 0 Register
(ASA10CR0, ASA12CR0, ASA21CR0, ASA23CR0). If AnalogBus is set to 0, the output to the analog column bus is
tri-stated. If AnalogBus is set to 1, the signal that is output to the analog column bus is selected by the ClockPhase
bit. If the ClockPhase bit is 0, the block output is gated by sampling clock on last part of PHI2. If the ClockPhase bit
is 1, the block output continuously drives the analog column bus.)
Bit 6 : CompBus Enable output to the comparator bus
0 = Disable output to comparator bus
1 = Enable output to comparator bus
Bit 5 : AutoZero Bit for controlling gated switches
0 = Shorting switch is not active. Input cap branches shorted to op-amp input
1 = Shorting switch is enabled during internal PHI1. Input cap branches shorted to analog ground during internal
PHI1 and to op-amp input during internal PHI2.
Bit [4:0] : CCap [4:0] Binary encoding for 32 possible capacitor sizes for C Capacitor:
0 0 0 0 0 = 0 Capacitor units in array
0 0 0 0 1 = 1 Capacitor units in array
0 0 0 1 0 = 2 Capacitor units in array
0 0 0 1 1 = 3 Capacitor units in array
0 0 1 0 0 = 4 Capacitor units in array
0 0 1 0 1 = 5 Capacitor units in array
0 0 1 1 0 = 6 Capacitor units in array
0 0 1 1 1 = 7 Capacitor units in array
0 1 0 0 0 = 8 Capacitor units in array
0 1 0 0 1 = 9 Capacitor units in array
0 1 0 1 0 = 10 Capacitor units in array
0 1 0 1 1 = 11 Capacitor units in array
0 1 1 0 0 = 12 Capacitor units in array
0 1 1 0 1 = 13 Capacitor units in array
0 1 1 1 0 = 14 Capacitor units in array
0 1 1 1 1 = 15 Capacitor units in array
Bit Name
Read/
Write
Bit #
POR
Analog Switch Cap Type A Block xx Control 2 Register
AnalogBus
RW
7
0
CompBus
RW
6
0
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
AutoZero
RW
5
0
1 0 0 0 0 = 16 Capacitor units in array
1 0 0 0 1 = 17 Capacitor units in array
1 0 0 1 0 = 18 Capacitor units in array
1 0 0 1 1 = 19 Capacitor units in array
1 0 1 0 0 = 20 Capacitor units in array
1 0 1 0 1 = 21 Capacitor units in array
1 0 1 1 0 = 22 Capacitor units in array
1 0 1 1 1 = 23 Capacitor units in array
1 1 0 0 0 = 24 Capacitor units in array
1 1 0 0 1 = 25 Capacitor units in array
1 1 0 1 0 = 26 Capacitor units in array
1 1 0 1 1 = 27 Capacitor units in array
1 1 1 0 0 = 28 Capacitor units in array
1 1 1 0 1 = 29 Capacitor units in array
1 1 1 1 0 = 30 Capacitor units in array
1 1 1 1 1 = 31 Capacitor units in array
CCap[4]
RW
4
0
CCap[3]
RW
3
0
CCap[2]
RW
2
0
CCap[1]
RW
1
0
September 5, 2002
CCap[0]
RW
0
0

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