MC68HC908SR12CFA Freescale Semiconductor, MC68HC908SR12CFA Datasheet - Page 172

• Manufacturer Part Number: MC68HC908SR12CFA
• Description: MICROCONTROLLER 48 PIN
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908SR12CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, Temp Sensor
• Number Of I /o: 31
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Q1145673

Monitor ROM (MON)
10.4.2 Data Format
10.4.3 Break Signal
Data Sheet
172
NOTE:
Exiting monitor mode after it has been initiated by having a blank reset
vector requires a power-on reset (POR). Pulling RST low will not exit
monitor mode in this situation.
Table 10-2
mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. Transmit and receive baud rates must
be identical.
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When
the monitor receives a break signal, it drives the PTA0 pin high for the
duration of two bits and then echoes back the break signal.
START
BIT
Monitor
Modes
User
0
BIT 0
1
summarizes the differences between user mode and monitor
2
MISSING STOP BIT
BIT 1
Monitor ROM (MON)
3
Vector
$FFFE
$FEFE
Reset
High
Figure 10-3. Monitor Data Format
Figure 10-4. Break Transaction
4
Table 10-2. Mode Differences
BIT 2
5
6
BIT 3
Vector
$FFFF
$FEFF
Reset
Low
7
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
BIT 4
$FFFC
$FEFC
Vector
Break
High
BIT 5
Functions
2-STOP BIT DELAY BEFORE ZERO ECHO
BIT 6
0
Vector
$FFFD
$FEFD
Break
Low
1
BIT 7
2
Freescale Semiconductor
3
Vector
$FFFC
$FEFC
STOP
High
SWI
BIT
4
5
START
NEXT
BIT
6
Vector
$FFFD
$FEFD
Low
SWI
7